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MC908QY2VPE Datasheet(PDF) 54 Page - Freescale Semiconductor, Inc |
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MC908QY2VPE Datasheet(HTML) 54 Page - Freescale Semiconductor, Inc |
54 / 184 page Configuration Register (CONFIG) MC68HC908QY/QT Family Data Sheet, Rev. 5 54 Freescale Semiconductor IRQPUD — IRQ Pin Pullup Control Bit 1 = Internal pullup is disconnected 0 = Internal pullup is connected between IRQ pin and VDD IRQEN — IRQ Pin Function Selection Bit 1 = Interrupt request function active in pin 0 = Interrupt request function inactive in pin OSCOPT1 and OSCOPT0 — Selection Bits for Oscillator Option (0, 0) Internal oscillator (0, 1) External oscillator (1, 0) External RC oscillator (1, 1) External XTAL oscillator RSTEN — RST Pin Function Selection 1 = Reset function active in pin 0 = Reset function inactive in pin NOTE The RSTEN bit is cleared by a power-on reset (POR) only. Other resets will leave this bit unaffected. COPRS (Out of STOP Mode) — COP Reset Period Selection Bit 1 = COP reset short cycle = 8176 × BUSCLKX4 0 = COP reset long cycle = 262,128 × BUSCLKX4 COPRS (In STOP Mode) — Auto Wakeup Period Selection Bit 1 = Auto wakeup short cycle = 512 × INTRCOSC 0 = Auto wakeup long cycle = 16,384 × INTRCOSC LVISTOP — LVI Enable in Stop Mode Bit When the LVIPWRD bit is clear, setting the LVISTOP bit enables the LVI to operate during stop mode. Reset clears LVISTOP. 1 = LVI enabled during stop mode 0 = LVI disabled during stop mode LVIRSTD — LVI Reset Disable Bit LVIRSTD disables the reset signal from the LVI module. 1 = LVI module resets disabled 0 = LVI module resets enabled Address: $001F Bit 7 6 5 4 3 2 1 Bit 0 Read: COPRS LVISTOP LVIRSTD LVIPWRD LVI5OR3 SSREC STOP COPD Write: Reset: 000 0 U 000 POR: 000 0 0000 U = Unaffected Figure 5-2. Configuration Register 1 (CONFIG1) |
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