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MC908QY4VDWE Datasheet(PDF) 51 Page - Freescale Semiconductor, Inc |
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MC908QY4VDWE Datasheet(HTML) 51 Page - Freescale Semiconductor, Inc |
51 / 184 page Input/Output Registers MC68HC908QY/QT Family Data Sheet, Rev. 5 Freescale Semiconductor 51 4.6 Input/Output Registers The AWU shares registers with the keyboard interrupt (KBI) module and the port A I/O module. The following I/O registers control and monitor operation of the AWU: • Port A data register (PTA) • Keyboard interrupt status and control register (KBSCR) • Keyboard interrupt enable register (KBIER) 4.6.1 Port A I/O Register The port A data register (PTA) contains a data latch for the state of the AWU interrupt request, in addition to the data latches for port A. AWUL — Auto Wakeup Latch This is a read-only bit which has the value of the auto wakeup interrupt request latch. The wakeup request signal is generated internally. There is no PTA6 port or any of the associated bits such as PTA6 data direction or pullup bits. 1 = Auto wakeup interrupt request is pending 0 = Auto wakeup interrupt request is not pending NOTE PTA5–PTA0 bits are not used in conjuction with the auto wakeup feature. To see a description of these bits, see 12.2.1 Port A Data Register. 4.6.2 Keyboard Status and Control Register The keyboard status and control register (KBSCR): • Flags keyboard/auto wakeup interrupt requests • Acknowledges keyboard/auto wakeup interrupt requests • Masks keyboard/auto wakeup interrupt requests Address: $0000 Bit 7 654321 Bit 0 Read: 0 AWUL PTA5 PTA4 PTA3 PTA2 PTA1 PTA0 Write: Reset: 0 0 Unaffected by reset = Unimplemented Figure 4-2. Port A Data Register (PTA) Address: $001A Bit 7 654321 Bit 0 Read: 0000 KEYF 0 IMASKK MODEK Write: ACKK Reset: 00000000 = Unimplemented Figure 4-3. Keyboard Status and Control Register (KBSCR) |
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