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MC908QY1CDTE Datasheet(PDF) 35 Page - Freescale Semiconductor, Inc |
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MC908QY1CDTE Datasheet(HTML) 35 Page - Freescale Semiconductor, Inc |
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35 / 184 page  FLASH Memory (FLASH) MC68HC908QY/QT Family Data Sheet, Rev. 5 Freescale Semiconductor 35 2.6.3 FLASH Mass Erase Operation Use the following procedure to erase the entire FLASH memory to read as a 1: 1. Set both the ERASE bit and the MASS bit in the FLASH control register. 2. Read the FLASH block protect register. 3. Write any data to any FLASH address(1) within the FLASH memory address range. 4. Wait for a time, tNVS (minimum 10 µs). 5. Set the HVEN bit. 6. Wait for a time, tMErase (minimum 4 ms). 7. Clear the ERASE and MASS bits. NOTE Mass erase is disabled whenever any block is protected (FLBPR does not equal $FF). 8. Wait for a time, tNVHL (minimum 100 µs). 9. Clear the HVEN bit. 10. After time, tRCV (typical 1 µs), the memory can be accessed in read mode again. NOTE Programming and erasing of FLASH locations cannot be performed by code being executed from the FLASH memory. While these operations must be performed in the order as shown, but other unrelated operations may occur between the steps. CAUTION A mass erase will erase the internal oscillator trim value at $FFC0. 2.6.4 FLASH Program Operation Programming of the FLASH memory is done on a row basis. A row consists of 32 consecutive bytes starting from addresses $XX00, $XX20, $XX40, $XX60, $XX80, $XXA0, $XXC0, or $XXE0. Use the following step-by-step procedure to program a row of FLASH memory Figure 2-4 shows a flowchart of the programming algorithm. NOTE Only bytes which are currently $FF may be programmed. 1. Set the PGM bit. This configures the memory for program operation and enables the latching of address and data for programming. 2. Read the FLASH block protect register. 3. Write any data to any FLASH location within the address range desired. 4. Wait for a time, tNVS (minimum 10 µs). 5. Set the HVEN bit. 6. Wait for a time, tPGS (minimum 5 µs). 7. Write data to the FLASH address being programmed(2). 1. When in monitor mode, with security sequence failed (see 15.3.2 Security), write to the FLASH block protect register instead of any FLASH address. 2. The time between each FLASH address change, or the time between the last FLASH address programmed to clearing PGM bit, must not exceed the maximum programming time, tPROG maximum. |
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