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MC908QY1VDTE Datasheet(PDF) 29 Page - Freescale Semiconductor, Inc

No. de Pieza. MC908QY1VDTE
Descripción  Microcontrollers
Descarga  184 Pages
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Fabricante  FREESCALE [Freescale Semiconductor, Inc]
Página de inicio  http://www.freescale.com
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MC908QY1VDTE Datasheet(HTML) 29 Page - Freescale Semiconductor, Inc

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Input/Output (I/O) Section
MC68HC908QY/QT Family Data Sheet, Rev. 5
Freescale Semiconductor
29
$0022
TIM Counter Register Low
(TCNTL)
See page 128.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
00
0000
00
$0023
TIM Counter Modulo
Register High (TMODH)
See page 129.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
11
1111
11
$0024
TIM Counter Modulo
Register Low (TMODL)
See page 129.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
11
1111
11
$0025
TIM Channel 0 Status and
Control Register (TSC0)
See page 130.
Read:
CH0F
CH0IE
MS0B
MS0A
ELS0B
ELS0A
TOV0
CH0MAX
Write:
0
Reset:
00
0000
00
$0026
TIM Channel 0
Register High (TCH0H)
See page 132.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
Indeterminate after reset
$0027
TIM Channel 0
Register Low (TCH0L)
See page 132.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Indeterminate after reset
$0028
TIM Channel 1 Status and
Control Register (TSC1)
See page 130.
Read:
CH1F
CH1IE
0
MS1A
ELS1B
ELS1A
TOV1
CH1MAX
Write:
0
Reset:
00
0000
00
$0029
TIM Channel 1
Register High (TCH1H)
See page 132.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
Indeterminate after reset
$002A
TIM Channel 1
Register Low (TCH1L)
See page 132.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Indeterminate after reset
$002B
$0035
Unimplemented
$0036
Oscillator Status Register
(OSCSTAT)
See page 96.
Read:
RR
RRR
R
ECGON
ECGST
Write:
Reset:
00
0000
00
$0037
Unimplemented
Read:
$0038
Oscillator Trim Register
(OSCTRIM)
See page 96.
Read:
TRIM7
TRIM6
TRIM5
TRIM4
TRIM3
TRIM2
TRIM1
TRIM0
Write:
Reset:
10
0000
00
Addr.
Register Name
Bit 7
6
5432
1
Bit 0
= Unimplemented
R
= Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 5)


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