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TPS3110E15DBVR Datasheet(PDF) 14 Page - Texas Instruments

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No. de pieza TPS3110E15DBVR
Descripción Electrónicos  UltraLow Supply-Current/Supply-Voltage Supervisory Circuits
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Fabricante Electrónico  TI [Texas Instruments]
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TPS3110E15DBVR Datasheet(HTML) 14 Page - Texas Instruments

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WATCHDOG
MANUAL RESET (MR)
PFI, PFO
SENSE
TPS3103xxx
TPS3106xxx
TPS3110xxx
SLVS363D – AUGUST 2001 – REVISED NOVEMBER 2006
APPLICATION INFORMATION (continued)
The TPS3110 device integrates a watchdog timer that must be periodically triggered by a positive or negative
transition of WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval,
RESET becomes active for the time period (tD). This event also reinitializes the watchdog timer.
Many
µC-based products require manual-reset capability, allowing an operator or logic circuitry to initiate a
reset. Logic low at MR asserts reset. Reset remains asserted while MR is low and for a time period (tD) after MR
returns high. The input has an internal 100-k
Ω pull-up resistor, so it can be left open if it is unused.
Connect a normally open momentary switch from MR to GND to create a manual reset function. External
debounce is not required. If MR is driven from long cables or if the device is used in noisy environments,
connecting a 0.1-
µF capacitor from MR to GND provides additional noise immunity.
If there is a possibility of transient or DC conditions causing MR to rise above VDD, a diode should be used to
limit MR to a diode drop above VDD.
The TPS3103 has an integrated power-fail (PFI) comparator with a separate open-drain (PFO) output. The PFI
and PFO can be used for low-battery detection, power-fail warning, or for monitoring a power supply other than
the main supply, and has no effect on RESET.
An additional comparator is provided to monitor voltages other than the nominal supply voltage. The power-fail
input (PFI) will be compared with an internal voltage reference of 0.551 V. If the input voltage falls below the
power-fail threshold (VIT – (S)), the power-fail output (PFO) goes low. If it goes above 0.551 V plus approximately
15-mV hysteresis, the output returns to high. By connecting two external resistors, it is possible to supervise any
voltage above 0.551 V. The sum of both resistors should be approximately 1 M
Ω, to minimize power
consumption and to assure that the current into the PFI pin can be neglected, compared with the current through
the resistor network. The tolerance of the external resistors should be not more than 1% to ensure minimal
variation of sensed voltage. If the power-fail comparator is unused, connect PFI to GND and leave PFO
unconnected. For proper operation of the PFI-comparator, the supply voltage (VDD) must be higher than 0.8 V.
The voltage at the SENSE input is compared with a reference voltage of 0.551 V. If the voltage at SENSE falls
below the sense-threshold (VIT – (S)), reset is asserted. On the TPS3106, a dedicated RSTSENSE output is
available. On the TPS3110, the logic signal from SENSE is OR-wired with the logic signal from VDD or MR. An
internal timer delays the return of the output to the inactive state, once the voltage at SENSE goes above 0.551
V plus about 15 mV of hysteresis. For proper operation of the SENSE-comparator, the supply voltage must be
higher than 0.8 V.
14
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