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TPS73615DRBT Datasheet(PDF) 2 Page - Texas Instruments

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No. de pieza TPS73615DRBT
Descripción Electrónicos  Cap-Free, NMOS, 400mA Low-Dropout Regulator with Reverse Current Protection
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Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI - Texas Instruments

TPS73615DRBT Datasheet(HTML) 2 Page - Texas Instruments

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ABSOLUTE MAXIMUM RATINGS
POWER DISSIPATION RATINGS
(1)
TPS736xx
SBVS038N – SEPTEMBER 2003 – REVISED JANUARY 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
ORDERING INFORMATION(1)
PRODUCT
VOUT(2)
TPS736xxyyyz
XX is nominal output voltage (for example, 25 = 2.5V, 01 = Adjustable(3)).
YYY is package designator.
Z is package quantity.
(1)
For the most current specification and package information, refer to the Package Option Addendum located at the end of this datasheet
or see the TI website at www.ti.com.
(2)
Additional output voltages from 1.25V to 4.3V in 100mV increments are available on a quick-turn basis using innovative factory
EEPROM programming. Minimum order quantities apply; contact factory for details and availability.
(3)
For fixed 1.2V operation, tie FB to OUT.
over operating free-air temperature range unless otherwise noted(1)
TPS736xx
UNIT
VIN range
–0.3 to 6.0
V
VEN range
–0.3 to 6.0
V
VOUT range
–0.3 to 5.5
V
VNR, VFB range
–0.3 to 6.0
V
Peak output current
Internally limited
Output short-circuit duration
Indefinite
Continuous total power dissipation
See Dissipation Ratings Table
Junction temperature range, TJ
–55 to +150
°C
Storage temperature range
–65 to +150
°C
ESD rating, HBM
2
kV
ESD rating, CDM
500
V
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under the Electrical Characteristics
is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
DERATING FACTOR
TA ≤ 25°C
TA = 70°C
TA = 85°C
BOARD
PACKAGE
RθJC
RθJA
ABOVE TA = 25°C
POWER RATING
POWER RATING
POWER RATING
Low-K(2)
DBV
64
°C/W
255
°C/W
3.9mW/
°C
390mW
215mW
155mW
High-K(3)
DBV
64
°C/W
180
°C/W
5.6mW/
°C
560mW
310mW
225mW
Low-K(2)
DCQ
15
°C/W
53
°C/W
18.9mW/
°C
1.89W
1.04W
0.76W
High-K(3)(4)
DRB
1.2
°C/W
40
°C/W
25.0mW/
°C
2.50W
1.38W
1.0W
(1)
See Power Dissipation in the Applications section for more information related to thermal design.
(2)
The JEDEC Low-K (1s) board design used to derive this data was a 3inch x 3inch, 2-layer board with 2-ounce copper traces on top of
the board.
(3)
The JEDEC High-K (2s2p) board design used to derive this data was a 3inch x 3inch, multilayer board with 1-ounce internal power and
ground planes and 2-ounce copper traces on the top and bottom of the board.
(4)
Based on preliminary thermal simulations.
2
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