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74CBTD3861DGVRE4 Datasheet(PDF) 4 Page - Texas Instruments |
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74CBTD3861DGVRE4 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 13 page SN74CBTD3861 10-BIT FET BUS SWITCH WITH LEVEL SHIFTING SCDS084G – JULY 1998 – REVISED JULY 2002 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION VOH VOL From Output Under Test CL = 50 pF (see Note A) LOAD CIRCUIT S1 7 V Open GND 500 Ω 500 Ω tPLH tPHL Output Control Output Waveform 1 S1 at 7 V (see Note B) Output Waveform 2 S1 at Open (see Note B) tPZL tPZH tPLZ tPHZ 3 V 0 V VOH VOL 0 V VOL + 0.3 V VOH – 0.3 V 0 V Input 3 V 3.5 V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES Output tpd tPLZ/tPZL tPHZ/tPZH Open 7 V Open TEST S1 NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V 1.5 V Figure 1. Load Circuit and Voltage Waveforms |
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