SPEAR-09-H022_06 datasheet(43/71 Pages) STMICROELECTRONICS

No. de pieza	SPEAR-09-H022

Descripción Electrónicos	SPEAr Head200 ARM 926, 200K customizable eASIC gates, large IP portfolio SoC

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Fabricante Electrónico	STMICROELECTRONICS [STMicroelectronics]

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SPEAR-09-H022

Multi-Port Memory Controller

43/71

The table is compiled in decreasing order of priority.

The I/O interfaces accessible from off-chip are listed here:

4

32

USB 2.0 Host 1

5

32

USB 2.0 Host 2

6

32

Ethernet MAC

7

32

Min.

Main AHB System Bus

Table 11.

Multi-Port Memory Controller off-chip interfaces

SIGNAL

DIRECTION

SIZE [bit]

DESCRIPTION

MPMCDQS

Input

2

Data Strobe

MPMCDATA

Bidirectional

32

Read / write data

MPMCCLKOUT

Output

2

DRAM clock

nMPMCCLKOUT

Output

2

DRAM inverted clock

MPMCCKEOUT

Output

2

DRAM clock enable

MPMCDQMOUT

Output

4

Data mask

nMPMCRASOUT

Output

1

RAS (active low)

nMPMCCASOUT

Output

1

CAS (active low)

nMPMCWEOUT

Output

1

Write Enable (active low)

nMPMCDYCSOUT

Output

4

Chip Select (active low)

MPMCADDROUT

Output

15

Address

SSTL_VREF

Input

1

Voltage reference SSTL / CMOS mode:

SSTL

→ 1.25 V

CMOS

→ 0 V

This pin is used both as logic state and as

power supply.

Table 10.

Multi-Port Memory Controller AHB port assignment (continued)

PORT

SIZE [bit]

PRIORITY

MASTER

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SPEAR-09-H022 Datasheet(PDF) 43 Page - STMicroelectronics

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