MC74LVXT8053

http://onsemi.com

2

X0

12

X1

13

A

11

B

10

C

9

ENABLE

6

X SWITCH

Y SWITCH

X

14

ANALOG

INPUTS/OUTPUTS

CHANNEL-SELECT

INPUTS

PIN 8 = GND

COMMON

OUTPUTS/INPUTS

Y0

2

Y1

1

Y

15

Z0

5

Z1

3

Z

4

Z SWITCH

NOTE: This device allows independent control of each switch. Channel−Select Input A

controls the X−Switch, Input B controls the Y−Switch and Input C controls the Z−Switch

Figure 1. LOGIC DIAGRAM

Triple Single−Pole, Double−Position Plus Common Off

PIN CONNECTION AND

MARKING DIAGRAM (Top View)

15

16

14

13

12

11

10

2

1

345

67

9

8

Y

X

X1

X0

A

B

C

Y1

Y0

Z1

Z

Z0 Enable NC

GND

L

L

L

L

H

H

H

H

X

L

L

H

H

L

L

H

H

X

L

H

L

H

L

H

L

H

X

FUNCTION TABLE − MC74LVXT8053

Control Inputs

ON Channels

Enable

Select

CBA

L

L

L

L

L

L

L

L

H

X = Don’t Care

Z0

Z0

Z0

Z0

Z1

Z1

Z1

Z1

Y0

Y0

Y1

Y1

Y0

Y0

Y1

Y1

X0

X1

X0

X1

X0

X1

X0

X1

NONE

ORDERING INFORMATION

Device

Package

MC74LVXT8053DR2

SOIC−16

2500 Tape & Reel

MC74LVXT8053DR2G

SOIC−16

(Pb−Free)

2500 Tape & Reel

MC74LVXT8053DTR2

TSSOP−16*

2500 Tape & Reel

MC74LVXT8053M

SOEIAJ−16

50 Units / Rail

MC74LVXT80531MG

SOEIAJ−16

(Pb−Free)

50 Units / Rail

MC74LVXT8053MEL

SOEIAJ−16

2000 Tape & Reel

MC74LVXT8053MELG

SOEIAJ−16

(Pb−Free)

2000 Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*This package is inherently Pb−Free.