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MC74LVXT8051MG Datasheet(PDF) 1 Page - ON Semiconductor |
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MC74LVXT8051MG Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 12 page © Semiconductor Components Industries, LLC, 2005 March, 2005 − Rev. 3 1 Publication Order Number: MC74LVXT8051/D MC74LVXT8051 Analog Multiplexer / Demultiplexer High−Performance Silicon−Gate CMOS The MC74LVXT8051 utilizes silicon−gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF leakage currents. This analog multiplexer/demultiplexer controls analog voltages that may vary across the complete power supply range (from VCC to GND). The LVXT8051 is similar in pinout to the high−speed HC4051A and the metal−gate MC14051B. The Channel−Select inputs determine which one of the Analog Inputs/Outputs is to be connected by means of an analog switch to the Common Output/Input. When the Enable pin is HIGH, all analog switches are turned off. The Channel−Select and Enable inputs are compatible with TTL−type input thresholds. The input protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic−level translator from 3.0 V CMOS logic to 5.0V CMOS Logic or from 1.8V CMOS logic to 3.0 V CMOS Logic while operating at the higher−voltage power supply. The MC74LVXT8051 input structure provides protection when voltages up to 7.0 V are applied, regardless of the supply voltage. This allows the MC74LVXT8051 to be used to interface 5.0 V circuits to 3.0 V circuits. This device has been designed so that the ON resistance (Ron) is more linear over input voltage than Ron of metal−gate CMOS analog switches. Features • Fast Switching and Propagation Speeds • Low Crosstalk Between Switches • Diode Protection on All Inputs/Outputs • Analog Power Supply Range (V CC − GND) = 2.0 to 6.0 V • Digital (Control) Power Supply Range (V CC − GND) = 2.0 to 6.0 V • Improved Linearity and Lower ON Resistance Than Metal−Gate Counterparts • Low Noise • In Compliance With the Requirements of JEDEC Standard No. 7A • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com MARKING DIAGRAMS A = Assembly Location WL or L = Wafer Lot Y = Year WW or W = Work Week TSSOP−16 DT SUFFIX CASE 948F SOEIAJ−16 M SUFFIX CASE 966 SOIC−16 D SUFFIX CASE 751B See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ORDERING INFORMATION LVXT8051 AWLYWW LVXT 8051 ALYW LVXT8051 ALYW 1 16 1 16 1 16 |
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