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CAT25320 Datasheet(Hoja de datos) 3 Page - Catalyst Semiconductor

No. de Pieza. CAT25320
Descripción  32-Kb SPI Serial CMOS EEPROM
Descarga  16 Pages
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Fabricante  CATALYST [Catalyst Semiconductor]
Página de inicio  http://www.catalyst-semiconductor.com
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CAT25320
© 2007 Catalyst Semiconductor, Inc.
3
Doc. No. 1111 Rev. E
Characteristics subject to change without notice
A.C. CHARACTERISTICS
TA = -40°C to +85°C, unless otherwise specified.
(1)
VCC = 1.8V-5.5V
VCC = 2.5V-5.5V
Symbol
Parameter
Min.
Max.
Min.
Max.
Units
fSCK
Clock Frequency
DC
5
DC
10
MHz
tSU
Data Setup Time
30
20
ns
tH
Data Hold Time
30
20
ns
tWH
SCK High Time
75
40
ns
tWL
SCK Low Time
75
40
ns
tLZ
HOLD
¯¯¯¯¯ to Output Low Z
50
25
ns
tRI
(2)
Input Rise Time
2
2
µs
tFI
(2)
Input Fall Time
2
2
µs
tHD
HOLD
¯¯¯¯¯ Setup Time
0
0
ns
tCD
HOLD
¯¯¯¯¯ Hold Time
10
10
ns
tV
Output Valid from Clock Low
75
40
ns
tHO
Output Hold Time
0
0
ns
tDIS
Output Disable Time
50
20
ns
tHZ
HOLD
¯¯¯¯¯ to Output High Z
100
25
ns
tCS
CS
¯¯ High Time
50
15
ns
tCSS
CS
¯¯ Setup Time
50
15
ns
tCSH
CS
¯¯ Hold Time
50
15
ns
tWPS
WP
¯¯¯ Setup Time
10
10
ns
tWPH
WP
¯¯¯ Hold Time
10
10
ns
tWC
(4)
Write Cycle Time
5
5
ms
Power-Up Timing
(2)(3)
Symbol
Parameter
Max.
Units
tPUR
Power-up to Read Operation
1
ms
tPUW
Power-up to Write Operation
1
ms
Notes:
(1) AC Test Conditions:
Input Pulse Voltages: 0.3VCC to 0.7VCC
Input rise and fall times: ≤ 10ns
Input and output reference voltages: 0.5VCC
Output load: current source IOL max/IOH max; CL = 50pF
(2) This parameter is tested initially and after a design or process change that affects the parameter.
(3) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated.
(4) tWC is the time from the rising edge of CS
¯¯ after a valid write sequence to the end of the internal write cycle.




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