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CAT25320 Datasheet(Hoja de datos) 6 Page - Catalyst Semiconductor

No. de Pieza. CAT25320
Descripción  32-Kb SPI Serial CMOS EEPROM
Descarga  16 Pages
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Fabricante  CATALYST [Catalyst Semiconductor]
Página de inicio  http://www.catalyst-semiconductor.com
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CAT25320
Doc. No. 1111 Rev. E
6
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
WRITE OPERATIONS
The CAT25320 device powers up into a write disable
state. The device contains a Write Enable Latch
(WEL) which must be set before attempting to write to
the memory array or to the status register. In addition,
the address of the memory location(s) to be written
must be outside the protected area, as defined by
BP0 and BP1 bits from the status register.
Write Enable and Write Disable
The internal Write Enable Latch and the correspon–
ding Status Register WEL bit are set by sending the
WREN instruction to the CAT25320. Care must be
taken to take the CS
¯¯ input high after the WREN
instruction, as otherwise the Write Enable Latch will
not be properly set. WREN timing is illustrated in
Figure 2. The WREN instruction must be sent prior
any WRITE or WRSR instruction.
The internal write enable latch is reset by sending the
WRDI instruction as shown in Figure 3. Disabling write
operations by resetting the WEL bit, will protect the
device against inadvertent writes.
Figure 2. WREN Timing
Note:
Dashed Line = mode (1, 1) - - - - - -
Figure 3. WRDI Timing
Note:
Dashed Line = mode (1, 1) - - - - - -
SCK
SI
CS
SO
000
0
0
11
0
HIGH IMPEDANCE
SCK
SI
CS
SO
0
0
000
10
0
HIGH IMPEDANCE




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