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CAT25320 Datasheet(Hoja de datos) 2 Page - Catalyst Semiconductor

No. de Pieza. CAT25320
Descripción  32-Kb SPI Serial CMOS EEPROM
Descarga  16 Pages
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Fabricante  CATALYST [Catalyst Semiconductor]
Página de inicio  http://www.catalyst-semiconductor.com
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CAT25320
Doc. No. 1111 Rev. E
2
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
ABSOLUTE MAXIMUM RATINGS
(1)
Parameters
Ratings
Units
Storage Temperature
–65 to +150
ºC
Voltage on any Pin with Respect to Ground
(2)
–0.5 to VCC + 0.5
V
RELIABILITY CHARACTERISTICS
(3)
Symbol
Parameter
Min
Units
NEND
(4)
Endurance
1,000,000
Program/ Erase Cycles
TDR
Data Retention
100
Years
D.C. OPERATING CHARACTERISTICS
VCC = +1.8V to +5.5V, TA=-40°C to +85°C unless otherwise specified.
Symbol Parameter
Test Conditions
Min
Max
Units
ICC
Supply Current
Read, Write, VCC = 5.0V, fSCK = 10MHz,
SO open
2
mA
ISB1
Standby Current
VIN = GND or VCC , CS
¯¯ = VCC , WP
¯¯¯ = VCC,
VCC = 5.0V
2
µA
ISB2
Standby Current
VIN = GND or VCC , CS
¯¯ = VCC , WP
¯¯¯ = GND,
VCC = 5.0V
4
µA
IL
Input Leakage Current
VIN = GND or VCC
-2
2
µA
ILO
Output Leakage Current CS
¯¯ = VCC , VOUT = GND or VCC
-1
1
µA
VIL
Input Low Voltage
-0.5
0.3VCC
V
VIH
Input High Voltage
0.7VCC
VCC + 0.5
V
VOL1
Output Low Voltage
VCC ≥ 2.5V, IOL = 3.0mA
0.4
V
VOH1
Output High Voltage
VCC ≥ 2.5V, IOH = -1.6mA
VCC - 0.8V
V
VOL2
Output Low Voltage
VCC < 2.5V, IOL = 150µA
0.2
V
VOH2
Output High Voltage
VCC < 2.5V, IOH = -100µA
VCC - 0.2V
V
PIN CAPACITANCE
(3)
TA = 25˚C, f = 1.0MHz, VCC = +5.0V
Symbol
Test
Conditions
Min
Typ
Max
Units
COUT
Output Capacitance (SO)
VOUT = 0V
8
pF
CIN
Input Capacitance (CS
¯¯ , SCK, SI, WP
¯¯¯, HOLD
¯¯¯¯¯)
VIN = 0V
8
pF
Notes:
(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
(2) The DC input voltage on any pin should not be lower than -0.5V or higher than VCC + 0.5V. During transitions, the voltage on any pin may
undershoot to no less than -1.5V or overshoot to no more than VCC + 1.5V, for periods of less than 20ns.
(3) These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC-Q100
and JEDEC test methods.
(4) Page Mode, VCC = 5V, 25°C




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