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CAT28F010 Datasheet(PDF) 6 Page - Catalyst Semiconductor

No. de Pieza. CAT28F010
Descripción  1 Megabit CMOS Flash Memory
Descarga  15 Pages
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Fabricante  CATALYST [Catalyst Semiconductor]
Página de inicio  http://www.catalyst-semiconductor.com
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CAT28F010 Datasheet(HTML) 6 Page - Catalyst Semiconductor

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CAT28F010
6
Doc. No. 1019, Rev. D
A.C. CHARACTERISTICS, Program/Erase Operation
VCC = +5V ±10%, unless otherwise specified.
\JEDEC
Standard
28F010-90
28F010-12
Symbol
Symbol
Parameter
Min
Typ
Max
Min
Typ
Max
Unit
tAVAV
tWC
Write Cycle Time
90
120
ns
tAVWL
tAS
Address Setup Time
0
0
ns
tWLAX
tAH
Address Hold Time
40
40
ns
tDVWH
tDS
Data Setup Time
40
40
ns
tWHDX
tDH
Data Hold Time
10
10
ns
tELWL
tCS
CE Setup Time
0
0
ns
tWHEH
tCH
CE Hold Time
0
0
ns
tWLWH
tWP
WE Pulse Width
40
40
ns
tWHWL
tWPH
WE High Pulse Width
20
20
ns
tWHWH1(2)
-
Program Pulse Width
10
10
µs
tWHWH2(2)
-
Erase Pulse Width
9.5
9.5
ms
tWHGL
Write Recovery Time
-
Before Read
6
6
µs
tGHWL
Read Recovery Time
-
Before Write
0
0
µs
tVPEL
-VPP Setup Time to CE
100
100
ns
Note:
(1) Please refer to Supply characteristics for the value of VPPH and VPPL. The VPP supply can be either hardwired or switched. If VPP is
switched, VPPL can be ground, less than VCC + 2.0V or a no connect with a resistor tied to ground.
(2) Program and Erase operations are controlled by internal stop timers.
(3) ‘Typicals’ are not guaranteed, but based on characterization data. Data taken at 25
°C, 12.0V VPP.
(4) Minimum byte programming time (excluding system overhead) is 16
µs (10 µs program + 6 µs write recovery), while maximum is 400 µs/
byte (16
µs x 25 loops). Max chip programming time is specified lower than the worst case allowed by the programming algorithm since
most bytes program significantly faster than the worst case byte.
(5) Excludes 00H Programming prior to Erasure.
28F010-90
28F010-12
Parameter
Min
Typ
Max
Min
Typ
Max
Unit
Chip Erase Time (3)(5)
0.5
10
0.5
10
Sec
Chip Program Time (3)(4)
2
12.5
2
12.5
Sec
ERASE AND PROGRAMMING PERFORMANCE (1)


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