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CAT28F020 Datasheet(PDF) 5 Page - Catalyst Semiconductor

No. de Pieza. CAT28F020
Descripción  2 Megabit CMOS Flash Memory
Descarga  15 Pages
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Fabricante  CATALYST [Catalyst Semiconductor]
Página de inicio  http://www.catalyst-semiconductor.com
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CAT28F020 Datasheet(HTML) 5 Page - Catalyst Semiconductor

 
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CAT28F020
5
Doc. No. 1029, Rev. C
SUPPLY CHARACTERISTICS
Figure 1. A.C. Testing Input/Output Waveform(3)(4)(5)
Testing Load Circuit (example)
A.C. CHARACTERISTICS, Read Operation
VCC = +5V ±10%, unless otherwise specified. (See Note 8)
JEDEC
Standard
28F020-90(7)
28F020-12(7)
Symbol
Symbol
Parameter
Min
Typ
Max
Min
Typ Max
Unit
tAVAV
tRC
Read Cycle Time
90
120
ns
tELQV
tCE
CE Access Time
90
120
ns
tAVQV
tACC
Address Access Time
90
120
ns
tGLQV
tOE
OE Access Time
35
50
ns
tAXQX
tOH
Output Hold from Address
OE/CE Change
0
0
ns
tGLQX
tOLZ(1)(6)
OE to Output in Low-Z
0
0
ns
tELQX
tLZ(1)(6)
CE to Output in Low-Z
0
0
ns
tGHQZ
tDF(1)(2)
OE High to Output High-Z
30
30
ns
tEHQZ
tDF(1)(2)
CE High to Output High-Z
40
40
ns
tWHGL(1)
-
Write Recovery Time Before Read
6
6
µs
1.3V
DEVICE
UNDER
TEST
1N914
3.3K
CL = 100 pF
OUT
CL INCLUDES JIG CAPACITANCE
INPUT PULSE LEVELS
REFERENCE POINTS
2.0 V
0.8 V
2.4 V
0.45 V
Note:
1.
This parameter is tested initially and after a design or process change that affects the parameter.
2.
Output floating (High-Z) is defined as the state where the external data line is no longer driven by the output buffer.
3.
Input Rise and Fall Times (10% to 90%) < 10 ns.
4.
Input Pulse Levels = 0.45 V and 2.4 V. For High Speed Input Pulse Levels 0.0 V and 3.0 V.
5.
Input and Output Timing Reference = 0.8 V and 2.0 V. For High Speed Input and Output Timing Reference = 1.5 V.
6.
Low-Z is defined as the state where the external data may be driven by the output buffer but may not be valid.
7.
For load and reference points, see Fig. 1.
8.
CAT28F020-90, VCCMIN = 4.75 V.
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