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CAT25C16AGI-12T Datasheet(Hoja de datos) 7 Page - Catalyst Semiconductor

No. de Pieza. CAT25C16AGI-12T
Descripción  16K-Bit CMOS PARALLEL EEPROM
Descarga  10 Pages
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Fabricante  CATALYST [Catalyst Semiconductor]
Página de inicio  http://www.catalyst-semiconductor.com
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CAT28C16A
7
Doc. No. 1076, Rev. D
ADDRESS
CE
WE
OE
I/O7
DIN = X
DOUT = X
DOUT = X
tOE
tOEH
tWC
tOES
DATA Polling
DATA polling is provided to indicate the completion of a
byte write cycle. Once a byte write cycle is initiated,
attempting to read the last byte written will output the
complement of that data on I/O7 (I/O0–I/O6 are indeter-
minate) until the programming cycle is complete. Upon
completion of the self-timed byte write cycle, all I/O’s will
output true data during a read cycle.
Byte Write
A write cycle is executed when both CE and WE are low,
and OE is high. Write cycles can be initiated using either
WE or CE, with the address input being latched on the
falling edge of WE or CE, whichever occurs last. Data,
conversely, is latched on the rising edge of WE or CE,
whichever occurs first. Once initiated, a byte write cycle
automatically erases the addressed byte and the new
data is written within 10 ms.
Figure 5. Byte Write Cycle [CE Controlled]
ADDRESS
CE
OE
WE
DATA OUT
tAS
DATA IN
DATA VALID
HIGH-Z
tAH
tWC
tOEH
tDH
tDS
tOES
tDL
tCH
tCS
tCW
Figure 6. DATA Polling




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