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CAT25C128XI-GT3 Datasheet(Hoja de datos) 1 Page - Catalyst Semiconductor

No. de Pieza. CAT25C128XI-GT3
Descripción  128K/256K-Bit SPI Serial CMOS EEPROM
Descarga  12 Pages
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Fabricante  CATALYST [Catalyst Semiconductor]
Página de inicio  http://www.catalyst-semiconductor.com
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1
CAT25C128/256
Document No. 1018, Rev. I
FEATURES
I 5 MHz SPI Compatible
I 1.8 to 5.5 Volt Operation
I Hardware and Software Protection
I Low Power CMOS Technology
I SPI Modes (0,0 &1,1)
I Industrial and Automotive
Temperature Ranges
I Self-Timed Write Cycle
I 64-Byte Page Write Buffer
I Block Write Protection
– Protect 1/4, 1/2 or all of EEPROM Array
I 100,000 Program/Erase Cycles
I 100 Year Data Retention
I RoHS-compliant packages
DESCRIPTION
The CAT25C128/256 is a 128K/256K-Bit SPI Serial
CMOS EEPROM internally organized as 16Kx8/32Kx8
bits. Catalyst’s advanced CMOS Technology
substantially reduces device power requirements. The
CAT25C128/256 features a 64-byte page write buffer.
The device operates via the SPI bus serial interface
and is enabled through a Chip Select (
CS). In addition
to the Chip Select, the clock input (SCK), data in (SI)
and data out (SO) are required to access the device.
The
HOLD pin may be used to suspend any serial
communication without resetting the serial sequence.
The CAT25C128/256 is designed with software and
hardware write protection features including Block Lock
protection. The device is available in 8-pin DIP, 8-pin
SOIC, 14-pin TSSOP and 20-pin TSSOP packages.
PIN CONFIGURATION
BLOCK DIAGRAM
SENSE AMPS
SHIFT REGISTERS
SPI
CONTROL
LOGIC
WORD ADDRESS
BUFFERS
I/O
CONTROL
EEPROM
ARRAY
COLUMN
DECODERS
XDEC
HIGH VOLTAGE/
TIMING CONTROL
SO
STATUS
REGISTER
BLOCK
PROTECT
LOGIC
DATA IN
STORAGE
SI
CS
WP
HOLD
SCK
PIN FUNCTIONS
Pin Name
Function
SO
Serial data Output
SCK
Serial Clock
WP
Write Protect
V
CC
Power Supply
V
SS
Ground
CS
Chip Select
SI
Serial Data Input
HOLD
Suspends Serial Input
NC
No Connect
**CAT25C128 only.
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
DIP Package (L)
TSSOP Package (Y20)**
SOIC Package
SS
SO
WP
VCC
HOLD
SCK
SI
1
2
3
4
8
7
6
5
CS
SO
WP
CS
VCC
HOLD
SCK
SI
1
2
3
4
8
7
6
5
VSS
TSSOP Package (Y14)**
SO
NC
NC
WP
CS
SI
HOLD
NC
NC
NC
SCK
NC
VSS
V CC
14
13
12
11
1
2
3
4
5
6
7
10
9
8
SO
NC
NC
WP
CS
SI
HOLD
NC
NC
SCK
SO
VSS
V CC
20
19
18
17
1
2
3
4
5
6
7
8
9
10
16
15
14
13
12
11
NC
NC
NC
NC
HOLD
NC
NC
(V**, X)
CAT25C128/256
128K/256K-Bit SPI Serial CMOS EEPROM
For Ordering Information details, see page 11.




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