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CAT93C66LIT2 Datasheet(PDF) 2 Page - Catalyst Semiconductor

No. de pieza CAT93C66LIT2
Descripción Electrónicos  4-Kb Microwire Serial CMOS EEPROM
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Fabricante Electrónico  CATALYST [Catalyst Semiconductor]
Página de inicio  http://www.catalyst-semiconductor.com
Logo CATALYST - Catalyst Semiconductor

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CAT93C66
Doc. No. 1089 Rev. P
2
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
ABSOLUTE MAXIMUM RATINGS
(1)
Parameters
Ratings
Units
Storage Temperature
-65 to +150
°C
Voltage on Any Pin with Respect to Ground
(2)
-0.5 to +6.5
V
RELIABILITY CHARACTERISTICS
(3)
Symbol
Parameter
Min
Units
NEND
(4)
Endurance
1,000,000
Program/ Erase Cycles
TDR
Data Retention
100
Years
D.C. OPERATING CHARACTERISTICS (NEW PRODUCT, DIE REV. G)
VCC = +1.8V to +5.5V, TA=-40°C to +85°C unless otherwise specified.
Symbol
Parameter
Test Conditions
Min
Max
Units
ICC1
Power Supply Current (Write)
fSK = 1MHz, VCC = 5.0V
1
mA
ICC2
Power Supply Current (Read)
fSK = 1MHz, VCC = 5.0V
500
µA
ISB1
Power Supply Current
(Standby) (x8 Mode)
VIN = GND or VCC, CS = GND
ORG = GND
2
µA
ISB2
Power Supply Current
(Standby) (x16 Mode)
VIN = GND or VCC, CS = GND
ORG = Float or VCC
1
µA
ILI
Input Leakage Current
VIN = GND to VCC
1
µA
ILO
Output Leakage Current
VOUT = GND to VCC, CS = GND
1
µA
VIL1
Input Low Voltage
4.5V ≤ VCC < 5.5V
-0.1
0.8
V
VIH1
Input High Voltage
4.5V ≤ VCC < 5.5V
2
VCC + 1
V
VIL2
Input Low Voltage
1.8V ≤ VCC < 4.5V
0
VCC x 0.2
V
VIH2
Input High Voltage
1.8V ≤ VCC < 4.5V
VCC x 0.7
VCC + 1
V
VOL1
Output Low Voltage
4.5V ≤ VCC < 5.5V, IOL = 2.1mA
0.4
V
VOH1
Output High Voltage
4.5V ≤ VCC < 5.5V, IOH = -400µA
2.4
V
VOL2
Output Low Voltage
1.8V ≤ VCC < 4.5V, IOL = 1mA
0.2
V
VOH2
Output High Voltage
1.8V ≤ VCC < 4.5V, IOH = -100µA
VCC - 0.2
V
Notes:
(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
(2) The DC input voltage on any pin should not be lower than -0.5V or higher than VCC + 0.5V. During transitions, the voltage on any pin may
undershoot to no less than -1.5V or overshoot to no more than VCC + 1.5V, for periods of less than 20 ns.
(3) These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC-Q100
and JEDEC test methods.
(4) Block Mode, VCC = 5V, 25°C


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