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MC14598B Datasheet(PDF) 1 Page - ON Semiconductor |
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MC14598B Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 6 page © Semiconductor Components Industries, LLC, 2006 June, 2006 − Rev. 6 1 Publication Order Number: MC14598B/D MC14598B 8−Bit Bus−Compatible Latches The MC14598B is an 8−bit latch addressed with an external binary address. The 8 latch−outputs are high drive, three−state and bus line compatible. The drive capability allows direct applications with MPU systems such as the Motorola 6800 family. The latches of the MC14598B are accessed via the Address pins, A0, A1, and A2. All 8 outputs from the latches are available in parallel when Enable is in the low state. Data is entered into a selected latch from the Data pin when the Strobe is high. Master reset is available on both parts. Features • Serial Data Input • Three−State Bus Compatible Parallel Outputs • Three−State Control Pin (Enable) TTL Compatible Input • Open Drain Full Flag (Multiple Latch Wire−O Ring) • Master Reset • Level Shifting Inputs on All Except Enable • Diode Protection — All Inputs • Supply Voltage Range — 3.0 Vdc to 18 Vdc • Capable of Driving TTL Over Rated Temperature Range With Fanout as Follows: 1 TTL Load 4 LSTTL Loads • Pb−Free Package is Available* MAXIMUM RATINGS (Voltages Referenced to VSS) Parameter Symbol Value Unit DC Supply Voltage Range VDD −0.5 to +18.0 V Input Voltage Range, enable (DC or Transient) Vin −0.5 to VDD +0.5 V Input Voltage Range, all Other Inputs (DC or Transient) Vin −0.5 to VDD +12 V Output Voltage Range, (DC or Transient) Vout −0.5 to VDD +0.5 V Input or Output Current (DC or Transient) per Pin Iin, Iout ±10 mA Power Dissipation per Package (Note 1) PD 500 mW Ambient Temperature Range TA −55 to +125 °C Storage Temperature Range Tstg −65 to +150 °C Lead Temperature (8−Second Soldering) TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/ _C From 65 _C To 125_C *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package Device Package Shipping ORDERING INFORMATION MC14598BCP PDIP−18 20 Units/Rail MARKING DIAGRAM 1 18 PDIP−18 P SUFFIX CASE 707 MC14598BCP AWLYYWWG MC14598BCPG PDIP−18 (Pb−Free) 20 Units/Rail http://onsemi.com This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS v (Vin or Vout) v VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. 1 Enable Outputs 1 High Impedance 0Dn Dn = State of nth latch OUTPUT TRUTH TABLE NC = NO CONNECTION |
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