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AD8310-EVAL Datasheet(PDF) 5 Page - Analog Devices |
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AD8310-EVAL Datasheet(HTML) 5 Page - Analog Devices |
5 / 24 page AD8310 Rev. E | Page 5 of 24 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INLO 1 COMM 2 OFLT 3 VOUT 4 INHI 8 ENBL 7 BFIN 6 VPOS 5 AD8310 TOP VIEW (Not to Scale) Figure 2. Pin Configuration Table 3. Pin Function Descriptions Pin No. Mnemonic Function 1 INLO One of Two Balanced Inputs. Biased roughly to VPOS/2. 2 COMM Common Pin. Usually grounded. 3 OFLT Offset Filter Access. Nominally at about 1.75 V. 4 VOUT Low Impedance Output Voltage. Carries a 25 mA maximum load. 5 VPOS Positive Supply. 2.7 V to 5.5 V at 8 mA quiescent current. 6 BFIN Buffer Input. Used to lower post-detection bandwidth. 7 ENBL CMOS Compatible Chip Enable. Active when high. 8 INHI Second of Two Balanced Inputs. |
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