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A3989 Datasheet(PDF) 5 Page - Allegro MicroSystems |
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A3989 Datasheet(HTML) 5 Page - Allegro MicroSystems |
5 / 12 page Bipolar Stepper and High Current DC Motor Driver A3989 5 Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com Device Operation The A3989 is designed to operate one dc motor and one bipolar stepper motor. The currents in each of the full bridges, all N-channel DMOS, are regulated with fixed off-time pulse width modulated (PWM) control circuitry. The peak current in each full bridge is set by the value of an external current sense resistor, RSx, and a reference voltage, VREFx. If the logic inputs are pulled up to VDD, it is good practice to use a high value pullup resistor in order to limit current to the logic inputs should an overvoltage event occur. Logic inputs include: PHASEx, I0x, I1x, ENABLE, and MODE. Internal PWM Current Control Each full-bridge is controlled by a fixed off-time PWM current control circuit that limits the load current to a user-specified value, ITRIP. Initially, a diagonal pair of source and sink DMOS outputs are enabled and current flows through the motor winding and RSx. When the voltage across the current sense resistor equals the voltage on the VREFx pin, the current sense comparator resets the PWM latch, which turns off the source driver. The maximum value of current limiting is set by the selection of RS and the voltage at the VREF input with a transconductance function approximated by: ITripMax = VREF / (3×RS) The stepper motor outputs will define each current step as a percentage of the maximum current, ITripMax. The actual current at each step ITrip is approximated by: ITrip = (% ITripMax / 100) ITripMax where % ITripMax is given in the Step Sequencing table. Note: It is critical to ensure that the maximum rating of ±500 mV on each SENSEx pin is not exceeded. Fixed Off-Time The internal PWM current control circuitry uses a one shot circuit to control the time the drivers remain off. The one shot off-time, toff, is internally set to 30 µs. Blanking This function blanks the output of the current sense comparator when the outputs are switched by the internal current control circuitry. The comparator output is blanked to prevent false detections of overcurrent conditions, due to reverse recovery currents of the clamp diodes, or to switching transients related to the capacitance of the load. Dc motors require more blank time than stepper motors. The stepper driver blank time, tBLANKst, is approximately 1 μs. The dc driver blank time, tBLANKdc, is approximately 3 μs. Control Logic Stepper motor communication is implemented via industry standard I1, I0, and PHASE interface. This commu- nication logic allows for full, half, and quarter step modes. Each bridge also has an independent VREF input so higher resolution step modes can be programmed by dynamically changing the voltage on the corresponding VREFx pin. The dc motor is controlled using standard PHASE, ENABLE communication. Fast or slow current decay during the off-time is selected via the MODE pin. Charge Pump (CP1 and CP2) The charge pump is used to generate a gate supply greater than the VBB in order to drive the source-side DMOS gates. A 0.1 μF ceramic capacitor should be connected between CP1 and CP2 for pumping purposes. A 0.1 μF ceramic capacitor is required between VCP and VBBx to act as a reservoir to operate the high-side DMOS devices. Shutdown In the event of a fault (excessive junction tem- perature, or low voltage on VCP), the outputs of the device are disabled until the fault condition is removed. At power-up, the undervoltage lockout (UVLO) circuit disables the drivers. Synchronous Rectification When a PWM-off cycle is triggered by an internal fixed off-time cycle, load current will recirculate. The A3989 synchronous rectification feature will turn on the appropriate MOSFETs during the current decay. This effectively shorts the body diode with the low RDS(on) driver. This significantly lowers power dissipation. When a zero current level Functional Description Functional Description |
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