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AM29DL800BT90WBF Datasheet(Hoja de datos) 22 Page - Advanced Micro Devices

No. de Pieza. AM29DL800BT90WBF
Descripción  8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
Descarga  46 Pages
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Fabricante  AMD [Advanced Micro Devices]
Página de inicio  http://www.amd.com
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 22 page
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20
Am29DL800B
21519C4 December 4, 2006
D A TA
SH EET
Command Definitions
Table 5.
Am29DL800B Command Definitions
Legend:
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed.
Addresses latch on the falling edge of the WE# or CE# pulse,
whichever happens later.
PD = Data to be programmed at location PA. Data latches on the
rising edge of WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or
erased. Address bits A18–A12 uniquely select any sector.
BA = Address of the bank that is being switched to autoselect
mode, is in bypass mode, or is being erased. Address bits A18–A16
select a bank.
Notes:
1.
See Table 1 for description of bus operations.
2.
All values are in hexadecimal.
3.
Except when reading array or autoselect data, all bus cycles
are write operations.
4.
Data bits DQ15–DQ8 are don’t cares for unlock and command
cycles.
5.
Address bits A18–A11 are don’t cares for unlock and command
cycles, unless bank address (BA) is required.
6.
No unlock or command cycles required when bank is in read
mode.
7.
The Reset command is required to return to reading array data
(or to the erase-suspend-read mode if previously in Erase
Suspend) when a bank is in the autoselect mode, or if DQ5 is
goes high (while the bank is providing status information).
8.
The fourth cycle of the autoselect command sequence is a read
cycle. The system must provide the bank address to obtain the
manufacturer or device ID information.
9.
The data is 00h for an unprotected sector and 01h for a
protected sector. See the Autoselect Command Sequence
section for more information.
10. The Unlock Bypass command is required prior to the Unlock
Bypass Program command.
11. The Unlock Bypass Reset command is required to return to
reading array data when the bank is in the unlock bypass mode.
12. The system may read and program in non-erasing sectors, or
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector
erase operation, and requires the bank address.
13. The Erase Resume command is valid only during the Erase
Suspend mode, and requires the bank address.
Command
Sequence
(Note 1)
Bus Cycles (Notes 2–5)
First
Second
Third
Fourth
Fifth
Sixth
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Read (Note 6)
1
RA
RD
Reset (Note 7)
1
XXX
F0
Manufacturer ID
Word
4
555
AA
2AA
55
(BA)555
90
(BA)X00
01
Byte
AAA
555
(BA)AAA
Device ID,
Top Boot Block
Word
4
555
AA
2AA
55
(BA)555
90
(BA)X01
224A
Byte
AAA
555
(BA)AAA
(BA)X02
4A
Device ID,
Bottom Boot Block
Word
4
555
AA
2AA
55
(BA)555
90
(BA)X01
22CB
Byte
AAA
555
(BA)AAA
(BA)X02
CB
Sector Protect Verify
(Note 9)
Word
4
555
AA
2AA
55
(BA)555
90
(SA)
X02
XX00
XX01
Byte
AAA
555
(BA)AAA
(SA)
X04
00
01
Program
Word
4
555
AA
2AA
55
555
A0
PA
PD
Byte
AAA
555
AAA
Unlock Bypass
Word
3
555
AA
2AA
55
555
20
Byte
AAA
555
AAA
Unlock Bypass Program (Note 10)
2
XXX
A0
PA
PD
Unlock Bypass Reset (Note 11)
2
BA
90
XXX
00
Chip Erase
Word
6
555
AA
2AA
55
555
80
555
AA
2AA
55
555
10
Byte
AAA
555
AAA
AAA
555
AAA
Sector Erase
Word
6
555
AA
2AA
55
555
80
555
AA
2AA
55
SA
30
Byte
AAA
555
AAA
AAA
555
Erase Suspend (Note 12)
1
BA
B0
Erase Resume (Note 13)
1
BA
30




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