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AM50DL9608GT75IS Datasheet(Hoja de datos) 11 Page - SPANSION

No. de Pieza. AM50DL9608GT75IS
Descripción  64 Megabit (4 M x 16-Bit) and 32 Megabit (2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories, and 8 Mbit
Descarga  70 Pages
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Fabricante  SPANSION [SPANSION]
Página de inicio  http://www.spansion.com
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 11 page
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10
Am50DL9608G
May 19, 2003
P R E L I M I NARY
Table 1.
Device Bus Operations—Flash Word Mode
Legend: L = Logic Low = V
IL, H = Logic High = VIH, VID = 11.5–12.5 V, VHH = 9.0 ± 0.5 V, X = Don’t Care, SADD = Flash Sector
Address, A
IN = Address In, DIN = Data In, DOUT = Data Out
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#fx = V
IL, CE1#s = VIL and CE2s = VIH at the same time.
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
IL, the boot sectors will be protected. If WP#/ACC = VIH the boot sectors protection will be removed.
If WP#/ACC = V
ACC (9V), the program time will be reduced by 40%.
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector
Block Protection and Unprotection” section.
6. If WP#/ACC = V
IL, the two outermost boot sectors remain protected. If WP#/ACC = VIH, the two outermost boot sector protection
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and
Unprotection”. If WP#/ACC = V
HH, all sectors will be unprotected.
7. Only one flash device should be accessed at a time. For Am29DL640G flash access, CE#f1 = V
IL, CE#f2 = VIH. For
Am29DL320G flash access, CE#f1 = V
IH, CE#f2 = ViL.
8. CE#1s= V
IL, CE2s= VIH, CE#f1=VIH and CE#f2=VIH when accessing pseudo SRAM.
Operation
(Notes 1, 2)
CE#f1
CE#f2
(Note 7)
CE1#s
(Note 8)
CE2s
(Note 8)
OE# WE#
Addr.
LB#s UB#s RESET#
WP#/
ACC
(Note 4)
DQ7–
DQ0
DQ15–
DQ8
Read from Flash
L
HX
LH
A
IN
XX
H
L/H
D
OUT
D
OUT
XL
Write to Flash
L
HX
HL
A
IN
X
X
H
(Note 4)
D
IN
D
IN
XL
Standby
V
CC ±
0.3 V
HX
XX
X
X
X
V
CC ±
0.3 V
H
High-Z
High-Z
XL
Output Disable
L
L
H
HH
X
L
X
H
L/H
High-Z
High-Z
HH
X
X
L
Flash Hardware
Reset
X
HX
X
X
X
X
X
L
L/H
High-Z
High-Z
XL
Sector Protect
(Note 5)
L
HX
HL
SADD,
A6 = L,
A1 = H,
A0 = L
XX
V
ID
L/H
D
IN
X
XL
Sector Unprotect
(Note 5)
L
HX
HL
SADD,
A6 = H,
A1 = H,
A0 = L
XX
V
ID
(Note 6)
D
IN
X
XL
Temporary Sector
Unprotect
X
HX
XX
X
X
X
V
ID
(Note 6)
D
IN
High-Z
XL
Read from Pseudo
SRAM
HL
H
L
H
A
IN
LL
HX
D
OUT
D
OUT
H
L
High-Z
D
OUT
LH
D
OUT
High-Z
Write to Pseudo
SRAM
HL
H
X
L
A
IN
LL
HX
D
IN
D
IN
H
L
High-Z
D
IN
LH
D
IN
High-Z




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