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ISL22326UFV14Z Datasheet(PDF) 3 Page - Intersil Corporation

No. de pieza ISL22326UFV14Z
Descripción Electrónicos  Dual Digitally Controlled Potentiometers
Download  13 Pages
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Fabricante Electrónico  INTERSIL [Intersil Corporation]
Página de inicio  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL22326UFV14Z Datasheet(HTML) 3 Page - Intersil Corporation

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3
FN6176.0
July 17, 2006
Absolute Maximum Ratings
Thermal Information
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage at any Digital Interface Pin
with Respect to GND . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC+0.3
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Voltage at any DCP Pin with Respect to GND. . . . . . . -0.3V to VCC
Lead Temperature (Soldering, 10s) . . . . . . . . . . . . . . . . . . . . . 300°C
IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA
Latchup (Note 4) . . . . . . . . . . . . . . . . . . Class II, Level B @ +125°C
ESD (HBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5kV
(CDM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1kV
Thermal Resistance (Typical, Note 3)
θ
JA (°C/W)
14 Lead TSSOP package . . . . . . . . . . . . . . . . . . . .
100
Recommended Operating Conditions
Temperature Range (Extended Industrial). . . . . . . . -40°C to +125°C
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Power Rating of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mW
Wiper Current of each DCP . . . . . . . . . . . . . . . . . . . . . . . . . . ±3.0mA
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3.
θ
JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
4. Jedec Class II pulse conditions and failure criterion used. Level B exceptions are: using a max positive pulse of 6.5V on the SHDN pin, and using
a max negative pulse of -0.8V for all pins.
Analog Specifications
Over recommended operating conditions unless otherwise stated.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
(NOTE 5)
MAX
UNIT
RTOTAL
RH to RL Resistance
W option
10
k
U option
50
k
RH to RL Resistance Tolerance
W and U option
-20
+20
%
End-to-End Temperature Coefficient
W option
±50
ppm/°C
(Note 19)
U option
±80
ppm/°C
(Note 19)
RW
Wiper Resistance
VCC = 3.3V @ +25°C, wiper current =
VCC/RTOTAL
70
200
VRH, VRL
VRH and VRL Terminal Voltages
VRH and VRL to GND
0
VCC
V
CH/CL/CW
(Note 19)
Potentiometer Capacitance
10/10/25
pF
ILkgDCP
Leakage on DCP Pins
Voltage at pin from GND to VCC
0.1
1
µA
VOLTAGE DIVIDER MODE (0V @ RLi; VCC @ RHi; measured at RWi, unloaded; i = 0 or 1)
INL
(Note 10)
Integral Non-linearity
Monotonic over all tap positions
-1
1
LSB
(Note 6)
DNL
(Note 9)
Differential Non-linearity
Monotonic over all tap positions
-0.5
0.5
LSB
(Note 6)
ZSerror
(Note 7)
Zero-scale Error
W option
0
1
5
LSB
(Note 6)
U option
0
0.5
2
FSerror
(Note 8)
Full-scale Error
W option
-5
-1
0
LSB
(Note 6)
U option
-2
-1
0
VMATCH
(Note 11)
DCP to DCP Matching
Any two DCPs at same tap position, same
voltage at all RH terminals, and same voltage
at all RL terminals
-2
2
LSB
(Note 6)
TCV
(Note 12)
Ratiometric Temperature Coefficient
DCP register set to 40 hex
±4
ppm/°C
ISL22326


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