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TPS62400

,, TPS62401

TPS62402, TPS62403

SLVS681D – JUNE 2006 – REVISED FEBRUARY 2007

ELECTRICAL CHARACTERISTICS (continued)

V

T

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

2x

Low time low bit, logic 0 detection

Signal level on MODE/DATA pin < 0.4V

400

µs

Low time high bit, logic 1 detection

Signal level on MODE/DATA pin < 0.4V

2

200

µs

2x

High time high bit, logic 1 detection

Signal level on MODE/DATA pin is > 1.2V

400

µs

End of Stream

2

µs

Duration of acknowledge condition

(MODE/DATE line pulled low by the

400

520

µs

device)

Acknowledge valid time

2

µs

Timeout for entering power save mode

MODE/DATA Pin changes from high to low

520

µs

POWER SWITCH

P-Channel MOSFET on-resistance,

280

620

m

Ω

Converter 1,2

P-Channel leakage current

1

µA

N-Channel MOSFET on-resistance

200

450

m

Ω

Converter 1,2

Includes N-Chanel leakage current,

Leakage current into SW1/SW2 pin

6

7.5

µA

OUTPUT 1

0.68

0.8

0.92

Forward Current Limit

2.5V

≤ V

A

PMOS and NMOS

OUTPUT 2

0.85

1.0

1.15

Thermal shutdown

Increasing junction temperature

150

°C

Thermal shutdown hysteresis

Decreasing junction temperature

20

°C

OSCILLATOR

fSW

Oscillator frequency

2.5V

≤ VIN ≤ 6V

2.0

2.25

2.5

MHz

OUTPUT

Adjustable output voltage range

0.6

V

Reference voltage

600

mV

Voltage positioning active,

MODE/DATA = GND,

1.01

–1.5%

2.5%

device operating in PFM mode,

MODE/DATA = GND;

DC output voltage accuracy adjustable

device operating in PWM Mode,

–1%

0%

1%

Fixed PWM operation,

–1%

0%

1%

DC output voltage load regulation

PWM operation mode

0.5

%/A

Start-up time

170

µs

750

µs

(4)

On pins SW1 and SW2 an internal resistor of 1M

Ω is connected to GND.

(5)

Output voltage specification does not include tolerance of external voltage programming resistors

(6)

Configuration L typ 2.2

µH, C

the effective capacitance of the output capacitor, larger output capacitors lead to tighter output voltage tolerance.

(7)

(8)

(9)

This time is valid if one converter turns from shutdown mode (EN2 = 0) to active mode (EN2 = 1) AND the other converter is already

enabled (e.g., EN1 = 1). In case both converters are turned from shutdown mode (EN1 and EN2 = low) to active mode (EN1 and/or

EN2=1) a value of typ 80

µs for ramp up of internal circuits needs to be added. After t

4

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