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MC9S12C32VFU16 Datasheet(PDF) 2 Page - Freescale Semiconductor, Inc |
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MC9S12C32VFU16 Datasheet(HTML) 2 Page - Freescale Semiconductor, Inc |
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2 / 680 page  To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://freescale.com/ A full list of family members and options is included in the appendices. The following revision history table summarizes changes contained in this document. This document contains information for all constituent modules, with the exception of the S12 CPU. For S12 CPU information please refer to the CPU S12 Reference Manual. Revision History Date Revision Level Description June, 2005 01.14 New Book July, 2005 01.15 Removed 16MHz option for 128K, 96K and 64K versions Minor corrections following review Oct, 2005 01.16 Added outstanding flash module descriptions Added EPP package options Corrected and Enhanced recommended PCB layouts Dec, 2005 01.17 Added note to PIM block diagram figure Dec, 2005 01.18 Added PIM rerouting information to 80-pin package diagram Jan, 2006 01.19 Modified LVI levels in electrical parameter section Corrected TSCR2 typo in timer register listing Mar, 2006 01.20 Cleaned up Device Overview Section May, 2006 01.21 Added 0M66G to PartID table Added units to MSCAN timing parameter table Corrected missing overbars on pin names Dec, 2006 01.22 Corrected CRGFLG contents in register summary Removed non existing part number options Removed unintended symbol fonts from table A6 May, 2007 01.23 Updated ATD section Corrected typos |
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