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ADA4937-1YCPZ-R2 Datasheet(PDF) 7 Page - Analog Devices |
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ADA4937-1YCPZ-R2 Datasheet(HTML) 7 Page - Analog Devices |
7 / 28 page ADA4937-1 Rev. 0 | Page 7 of 28 ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Rating Supply Voltage 5.5 V Power Dissipation See Figure 3 Storage Temperature Range −65°C to +125°C Operating Temperature Range −40°C to +105°C Lead Temperature (Soldering, 10 sec) 300°C Junction Temperature 150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE θJA is specified for the device (including exposed pad) soldered to a high thermal conductivity 2s2p circuit board, as described in EIA/JESD 51-7. Table 6. Thermal Resistance Package Type θJA Unit 16-Lead LFCSP (Exposed Pad) 95 °C/W Maximum Power Dissipation The maximum safe power dissipation in the ADA4937-1 package is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ADA4937-1. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (IS). The power dissipated due to the load drive depends upon the particular application. The power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device. RMS voltages and currents must be used in these calculations. Airflow increases heat dissipation, effectively reducing θJA. In addition, more metal directly in contact with the package leads/exposed pad from metal traces, through holes, ground, and power planes reduces the θJA. Figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 16-lead LFCSP (95°C/W) on a JEDEC standard 4-layer board. 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 –45 105 95 85 75 65 55 45 35 25 15 5 –5 –15 –25 –35 AMBIENT TEMPERATURE (°C) Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board ESD CAUTION |
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