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ADAU1592ACPZ-RL Datasheet(PDF) 1 Page - Analog Devices |
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ADAU1592ACPZ-RL Datasheet(HTML) 1 Page - Analog Devices |
1 / 24 page Class-D Audio Power Amplifier ADAU1592 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved. FEATURES Integrated stereo modulator and power stage 0.005% THD + N 101 dB dynamic range PSRR > 65 dB RDS-ON < 0.3 Ω (per transistor) Efficiency > 90% (8 Ω) EMI-optimized modulator On/off-mute pop-noise suppression Short-circuit protection Overtemperature protection APPLICATIONS Flat panel televisions PC audio systems Mini-components GENERAL DESCRIPTION The ADAU1592 is a 2-channel, bridge-tied load (BTL) switching audio power amplifier with an integrated Σ-Δ modulator. The modulator accepts an analog input signal and generates a switching output to drive speakers directly. A digital, microcontroller-compatible interface provides control of reset, mute and PGA gain as well as output signals for thermal and overcurrent error conditions. The output stage can operate from supply voltages ranging from 9 V to 18 V. The analog modulator and digital logic operate from a 3.3 V supply. FUNCTIONAL BLOCK DIAGRAM A1 PVDD OUTL+ PGND A2 B1 PVDD OUTL– PGND B2 C1 PVDD OUTR+ PGND C2 D1 PVDD OUTR– PGND D2 LEVEL SHIFT AND DEAD TIME CONTROL Σ-Δ MODULATOR TEMPERATURE/ OVERCURRENT PROTECTION MODE CONTROL LOGIC CLOCK OSCILLATOR PGA ADAU1592 fCLK/2 VOLTAGE REFERENCE PGA SLICER AINL SLC_TH PGA0 PGA1 PGA0 PGA1 AINR VREF AVDD AGND DVDD DGND OTW XTO XTI ERR MUTE STDN MO/ST Figure 1. |
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