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M27C512-10F3 Datasheet(PDF) 7 Page - STMicroelectronics

No. de pieza M27C512-10F3
Descripción Electrónicos  512 Kbit (64K x8) UV EPROM and OTP EPROM
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M27C512-10F3 Datasheet(HTML) 7 Page - STMicroelectronics

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M27C512
Device operation
7/22
Figure 4.
Programming flowchart
2.5
Programming
When delivered (and after each erasure for UV EPROM), all bits of the M27C512 are in the
'1' state. Data is introduced by selectively programming '0's into the desired bit locations.
Although only '0's will be programmed, both '1's and '0's can be present in the data word.
The only way to change a '0' to a '1' is by die exposure to ultraviolet light (UV EPROM). The
M27C512 is in the programming mode when VPP input is at 12.75V and E is pulsed to VIL.
The data to be programmed is applied to 8 bits in parallel to the data output pins. The levels
required for the address and data inputs are TTL. VCC is specified to be 6.25V ± 0.25V. The
M27C512 can use PRESTO IIB Programming Algorithm that drastically reduces the
programming time (typically less than 6 seconds). Nevertheless to achieve compatibility with
all programming equipments, PRESTO Programming Algorithm can be used as well.
2.6
PRESTO IIB programming algorithm
PRESTO IIB Programming Algorithm allows the whole array to be programmed with a
guaranteed margin, in a typical time of 6.5 seconds. This can be achieved with
STMicroelectronics M27C512 due to several design innovations described in the M27C512
datasheet to improve programming efficiency and to provide adequate margin for reliability.
Before starting the programming the internal MARGIN MODE circuit is set in order to
guarantee that each cell is programmed with enough margin. Then a sequence of 100µs
program pulses are applied to each byte until a correct verify occurs. No overprogram
pulses are applied since the verify in MARGIN MODE provides the necessary margin.
AI00738B
n = 0
Last
Addr
VERIFY
E = 100
µs Pulse
++n
= 25
++ Addr
VCC = 6.25V, VPP = 12.75V
FAIL
CHECK ALL BYTES
1st: VCC = 6V
2nd: VCC = 4.2V
YES
NO
YES
NO
YES
NO
SET MARGIN MODE
RESET MARGIN MODE


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