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MC912D60PMPV8 Datasheet(PDF) 90 Page - Freescale Semiconductor, Inc |
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MC912D60PMPV8 Datasheet(HTML) 90 Page - Freescale Semiconductor, Inc |
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90 / 460 page  Bus Control and Input/Output Technical Data MC68HC912D60A — Rev. 3.1 90 Bus Control and Input/Output Freescale Semiconductor 0 = Associated pin is a high-impedance input 1 = Associated pin is an output PE[1:0] are associated with XIRQ and IRQ and cannot be configured as outputs. These pins can be read regardless of whether the alternate interrupt functions are enabled. This register is not in the map in peripheral mode and expanded modes while the EME control bit is set. Read and write anytime. The PEAR register is used to choose between the general-purpose I/O functions and the alternate bus control functions of port E. When an alternate control function is selected, the associated DDRE bits are overridden. The reset condition of this register depends on the mode of operation because bus-control signals are needed immediately after reset in some modes. In normal single-chip mode, no external bus control signals are needed so all of port E is configured for general-purpose I/O. BIT 7 654321 BIT 0 NDBE CGMTE PIPOE NECLK LSTRE RDWE CALE DBENE RESET: 00000000 Normal Expanded RESET: 00101100 Special Expanded RESET: 11010000 Peripheral RESET: 10010000 Normal single chip RESET: 00101100 Special single chip PEAR — Port E Assignment Register $000A |
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Descripción similar - MC912D60PMPV8 |
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