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MP8040 Datasheet(PDF) 4 Page - Monolithic Power Systems

No. de pieza MP8040
Descripción Electrónicos  High Current Integrated Half Bridge Driver
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Fabricante Electrónico  MPS [Monolithic Power Systems]
Página de inicio  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP8040 Datasheet(HTML) 4 Page - Monolithic Power Systems

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MP8040 – HIGH CURRENT INTEGRATED HALF BRIDGE + DRIVER
MP8040 Rev. 1.5
www.MonolithicPower.com
4
5/3/2005
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2005 MPS. All Rights Reserved.
TM
PIN FUNCTIONS
Pin #
Name
Description
1
PWM
Driver Logic Input. Drive PWM with the signal that controls the MP8040 output. Drive PWM
high to turn on the high-side switch; drive PWM low to turn on the low-side switch.
2
SP
Power Supply Input. Connect SP to the positive side of the input power supply. Bypass SP
to GND as close to the IC as possible.
3
SW
Switched Output. SW is the power output of the MP8040. Connect the output LC filter to
SW. SW is valid approximately 100µs after SP goes high.
4
GND
Ground. (Note: Connect the exposed pad on the bottom side to Pin 4).
5
BS
Bootstrap Supply. BS powers the high-side gate of the MP8040. Connect a 0.1µF or
greater capacitor between BS and SW.
6
SHDN
Shutdown Input. SHDN enables/disables the MP8040. Drive SHDN low to turn on the
MP8040, drive it high to turn it off. If not used, connect SHDN to GND.
7
DRV
Gate Drive Supply Bypass. The voltage at DRV is supplied from an internal regulator from
SP. DRV powers the internal circuitry and internal MOSFET gate drives. Bypass DRV to
GND with a 0.1µF to 10µF capacitor.
8
FLT
Fault Output. Active-low, open drain. A low output at FLT indicates that the MP8040 has
detected a fault and has shutdown. Connect FLT to DRV through a 100kΩ resistor.
OPERATION
The MP8040 is a general purpose, power
driver. It takes a logic input and drives a half
bridge comprised of 0.1Ω high-side and
low-side N-Channel MOSFET switches.
It operates at frequencies up to 1.2MHz, can
accept a DC supply voltage as high as 25V,
and produce peak output current as high as 9A.
HI DRIVE
LO DRIVE
CURRENT
LIMIT &
FEEDBACK
BS
UVLO
THERMAL
SHUTDOWN
UVLO
INTERNAL
5V REG.
LOGIC
DBS
8
6
1
7
5
2
3
4
DRV
PWM
FLT
SHDN
BS
SP
SW
GND
MP8040_F02
Figure 1—Function Block Diagram


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