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TDA4672 Datasheet(PDF) 5 Page - NXP Semiconductors |
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TDA4672 Datasheet(HTML) 5 Page - NXP Semiconductors |
5 / 16 page 1996 Dec 11 5 Philips Semiconductors Product specification Picture Signal Improvement (PSI) circuit with enhanced peaking function TDA4672 FUNCTIONAL DESCRIPTION The TDA4672 contains luminance signal processing. The luminance signal section comprises a variable, integrated luminance delay line with luminance signal peaking and noise reduction by coring. All functions and parameters are controlled via the I2C-bus. Y-signal path The video and blanking signal is AC-coupled to the input pin 16. Its black porch is clamped to a DC reference voltage to ensure the correct operating range of the luminance delay stage. The luminance delay line consists of all-pass filter sections with delay times of 45, 90, 100, 180 and 450 ns (see Fig.1). The luminance signal delay is controlled via the I2C-bus in steps of 45 ns in the range of 20 to 1100 ns, this ensures that the maximum delay difference between the luminance and colour-difference signals is ±22.5 ns. An automatic luminance delay time adjustment in an internal control loop (with the horizontal frequency as a reference) is used to correct changes in the delay time, due to component tolerances. The control loop is automatically enabled between the burst key pulses of lines 16 (330) and 17 (331) during the vertical blanking interval. The control voltage is stored in the capacitor CDL connected to pin 2. The peaking section uses a transversal filter circuit with selectable centre frequencies of 2.6 and 5.0 MHz. It provides selectable degrees of peaking from −6to+9dB and noise reduction by coring, which attenuates the high-frequency noise introduced by peaking. The output buffer stage ensures a low-ohmic Video Blanking Synchronization (VBS) output signal on pin 12 (<160 Ω). The gain of the luminance signal path from pin 16 to pin 12 is unity. An oscillation signal of the delay time control loop is present on output pin 12 instead of the VBS signal. It is present during the vertical blanking interval of the burst key pulses in lines 16 (330) to 18 (332). This sync should not be applied for synchronization. Colour-difference signal paths The colour-difference input signals (on pins 3 and 7) are connected directly to the output pins. This is for compatibility with other Philips Semiconductors PSI-circuits. |
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