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TDA8315 Datasheet(PDF) 7 Page - NXP Semiconductors |
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TDA8315 Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 16 page September 1994 7 Philips Semiconductors Preliminary specification Integrated NTSC decoder and sync processor TDA8315T CHROMINANCE BANDPASS CIRCUIT fc centre frequency − 3.58 − MHz QBP bandpass quality factor − 3 − Y DELAY LINE td delay time note 2 − 390 − ns B bandwidth of internal delay line note 2 8 −− MHz Y OUTPUT SIGNAL (PIN19) V19(p-p) output signal amplitude (peak-to-peak value) note 1 − 2.27 − V ZO output impedance − 350 −Ω V19 top sync level − 2.85 − V S/N signal-to-noise ratio notes 2 and 5 − 56 − dB Colour decoder CHROMINANCE AMPLIFIER ACCcr ACC control range note 6 24 −− dB ∆V change in amplitude of the output signals over the ACC range −− 2dB THRon threshold colour killer ON tbf −31 tbf dB HYSoff hysteresis colour killer OFF note 2 strong input signal S/N ≥ 40 dB − +3 − dB noisy input signal − +1 − dB ACL CIRCUIT chrominance burst ratio at which the ACL starts to operate 2.3 − 2.7 REFERENCE PART Phase-locked loop; note 7 (filter connected to pin 22) fCR catching range 300 500 − Hz ∆ϕ phase shift for a ±400 Hz deviation of the oscillator frequency note 7 −− 2 deg Oscillator (pin 24) TCosc temperature coefficient of fosc note 2 − 2.0 2.5 Hz/K ∆f osc fosc deviation with respect to VP note 2; VP =8V±10% −− 250 Hz RI input resistance note 4 − 1.5 − k Ω CI input capacitance note 4 −− 10 pF HUE CONTROL INPUT (PIN 18) HUEcr hue control range see also Fig.3 ±35 ±45 − deg SATURATION CONTROL INPUT (PIN 16) SATcr saturation control range see also Fig.4 52 −− dB SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
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