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TDA8961 Datasheet(PDF) 3 Page - NXP Semiconductors |
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TDA8961 Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 36 page 2000 May 19 3 Philips Semiconductors Objective specification ATSC Digital Terrestrial TV demodulator/decoder TDA8961 GENERAL DESCRIPTION The TDA8961 is an Advanced Television Systems Committee (ATSC)-compliant demodulator and FEC decoder for reception of 8-VSB modulated signals for terrestrial and cable applications: • Terrestrial: reception of 8-VSB modulated signals via standard 6 MHz VHF/UHF terrestrial TV channels (TV channels 2 to 69 in the United States). • Cable: reception of 8-VSB modulated signals via standard 6 MHz VHF/UHF cable TV channels. An application using the TDA8961 and the TDA8980 NTSC/ATSC TV input processor for TV and Multi-Media is shown in Fig.1. A tuner converts the incoming RF signal to a fixed IF centered at 44 MHz. The output signal from the tuner is filtered and fed to the TDA8980 which performs the following functions: • Decodes the analog NTSC signals: The audio signals are digitized, using on-chip audio stereo A/D converters, into an I2S-bus stream; the video information is digitized, using on-chip video A/D converters, into an ITU656 stream. • Down converts the incoming 6 MHz wide 8-VSB IF signal to a low-IF signal centered at 4 MHz: The low-IF signal is then digitized, using an on-chip 10-bit A/D converter, and fed to the TDA8961 for further processing. In this application, AGC is also managed by the TDA8980 so that no other external components, such as an operational amplifier loop integrator, are required. Although the TDA8980 has an internal 2-D comb filter, external filters such as a 3-D comb filter and other picture improvement devices can easily be connected. Sound can be decoded using an external device such as the TDA9851 I2C-bus controlled economic BTSC stereo decoder. This IC has an internal switch allowing it to process either analog NTSC IF or digital 8-VSB IF signals. A 12 MHz clock signal is generated using a 12 MHz crystal connected to the TDA8980. The TDA8961 also uses this clock signal which is fed from the TDA8980 to pin XTALI of the TDA8961. handbook, full pagewidth ADCLK ADIN9 to ADIN0 TDA8961 TDA8980 XTALI AGCOUT PDOERR PDOVAL PDO7 to PDO0 PDOSYNC PDOCLK VCLK D9 to D0 REF12M TVIFIN VSBIFIN TUNERAGC VIFAGC X12MIN 12 MHz X12MOUT PDI0 PDISYNC PDIVAL serial MPEG-2 transport stream input MPEG-2 transport stream PDICLK PDIERR NTSC SAW FILTER TUNER FLAT SAW FILTER I2C I2C I2C master I2C MGU085 Fig.1 Front-end design for a hybrid TV system using the TDA8980 and TDA8961. |
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