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GSC2118 Datasheet(PDF) 3 Page - GTM CORPORATION

No. de Pieza. GSC2118
Descripción  1.5A CMOS LOW DROPOUT VOLTAGE REGULATOR
Descarga  7 Pages
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Fabricante  GTM [GTM CORPORATION]
Página de inicio  http://www.gtm.com.tw
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GSC2118 Datasheet(HTML) 3 Page - GTM CORPORATION

   
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GSC2118
Page: 3/7
ISSUED DATE :2006/04/13
REVISED DATE :
Ordering Information ( contd. )
Part Number
Marking
Output Voltage
Part Number
Marking
Output Voltage
GSC2118-AD
8AAD2
XXXX
Adjustable
Detailed Description
The GSC2118 of COMS regulator contains a PMOS pass transistor, voltage reference, error amplifier, over-
current protection, and thermal shutdown.
The P-channel pass transistor receives data from the error amplifier, over-current shutdown, and thermal
protection circuits. During normal operation, the error amplifier compares the output voltage to a precision
reference. Over-current and Thermal shutdown circuits become active when the junction temperature exceeds
140 : , or the current exceeds 2.2A. During thermal shutdown, the output voltage remains low. Normal
operation is restored when the junction temperature drops below 120 : .
The GSC2118 behaves like a current source when the load reaches 2.2A. However, if the load impedance
drops below 0.3 , the current drops back to 600mA to prevent excessive power dissipation. Normal operation
is restored when the load resistance exceeds 0.75 .
External Capacitors
The GSC2118 is stable with an output capacitance to ground of 4.7 F or greater. Ceramic capacitors have the
lowest ESR, and will offer the best AC performance. Conversely, Aluminum Electrolytic capacitors exhibit the
highest ESR, resulting in the poorest AC response. Unfortunately, large value ceramic capacitors are
comparatively expensive. One option is to parallel a 0.1 F ceramic capacitor with a 10 F Aluminum Electrolytic.
The benefit is low ESR, high capacitance, and low overall cost.
A second capacitor is recommended between the input and ground to stabilize Vin. The input capacitor should
be at least 0.1 F to have a beneficial effect.
All capacitors should be placed in close proximity to the pins. A “Quiet” ground termination is desirable. This
can be achieved with a “Star” connection.
Enable
When pulled low, the PMOS pass transistor shuts off, and all internal circuits are powered down. In this state,
the quiescent current is less than 1 A. This pin behaves much like an electronic switch.
100k resistor is necessary between VEN source and EN pin when VEN is higher than VIN.
(Note: there is no internal pull-up for EN PIN)
Adjustable Version
The adjustable version uses external feedback resistors to generate an output voltage anywhere from 1.5V to
5.0V. Vadj is trimmed to 1.242V and Vout is given by the equation:
VOUT=Vadj * (1+R1/R2)
Feedback resistors R1 and R2 should be high enough to keep quiescent current low, but increasing R1+R2 will
reduce stability. In general, R1 and R2 in the 10’s of k will produce adequate stability, given reasonable
layout precautions. To improve stability characteristics, keep parasitic on the ADJ pin to minimum, and lower
R1 and R2 values.


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