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AD7843 Datasheet(PDF) 8 Page - Analog Devices |
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AD7843 Datasheet(HTML) 8 Page - Analog Devices |
8 / 16 page REV. 0 AD7843 –8– CIRCUIT INFORMATION The AD7843 is a fast, low-power, 12-bit, single supply, A/D converter. The AD7843 can be operated from a 2.2 V to 5.25 V supply. When operated from either a 5 V supply or a 3 V supply, the AD7843 is capable of throughput rates of 125 kSPS when provided with a 2 MHz clock. The AD7843 provides the user with an on-chip track/hold, multiplexer, A/D converter, and serial interface housed in a tiny 16-lead QSOP or TSSOP package, which offers the user consid- erable space-saving advantages over alternative solutions. The serial clock input (DCLK) accesses data from the part but also provides the clock source for the successive-approximation A/D converter. The analog input range is 0 V to VREF (where the externally-applied VREF can be between 1 V and VCC). The analog input to the ADC is provided via an on-chip multi- plexer. This analog input may be any one of the X and Y panel coordinates. The multiplexer is configured with low resistance switches that allow an unselected ADC input channel to provide power and an accompanying pin to provide ground for an exter- nal device. For some measurements the on-resistance of the switches may present a source of error. However, with a dif- ferential input to the converter and a differential reference architecture this error can be negated. ADC TRANSFER FUNCTION The output coding of the AD7843 is straight binary. The designed code transitions occur at successive integer LSB values (i.e., 1 LSB, 2 LSBs, etc.). The LSB size is = VREF/4096. The ideal transfer characteristic for the AD7843 is shown in Figure 2 below. 000...000 0V ANALOG INPUT 111...111 000...001 000...010 111...110 111...000 011...111 1LSB +VREF–1LSB 1LSB = VREF/4096 Figure 2. AD7843 Transfer Characteristic TYPICAL CONNECTION DIAGRAM Figure 3 shows a typical connection diagram for the AD7843 in a touch screen control application. The AD7843 requires an exter- nal reference and an external clock. The external reference can be any voltage between 1 V and VCC. The value of the reference voltage will set the input range of the converter. The conversion result is output MSB first followed by the remaining eleven bits and three trailing zeroes depending on the number of clocks used per conversion, see the Serial Interface section. For applications where power consumption is of concern, the power management option should be used to improve power performance. See Table III for the available power management options. 16 15 14 13 12 11 9 8 1 2 3 4 7 6 5 AD7843 CS DIN DCLK VREF +VCC GND DOUT X+ IN3 IN4 10 BUSY +VCC PENIRQ X– Y+ Y– SERIAL/CONVERSION CLOCK CHIP SELECT SERIAL DATA IN CONVERTER STATUS SERIAL DATA OUT PEN INTERRUPT AUXILIARY INPUTS 0.1 F 1 F TO 10 F (OPTIONAL) 2.2V TO 5V 100k (OPTIONAL) 0.1 F TOUCH SCREEN Figure 3. Typical Application Circuit TPC 12 shows a typical FFT plot for the auxiliary channels of the AD7843 at 125 kHz sample rate and 15 kHz input frequency. TPC 13 shows the power supply rejection ratio versus VCC supply frequency for the AD7843. The power supply rejection ratio is defined as the ratio of the power in the ADC output at full-scale frequency f, to the power of a 100 mV sine wave applied to the ADC VCC supply of frequency fS: PSRR (dB) = 10 log (Pf/Pfs) Pf = Power at frequency f in ADC output, Pfs = power at fre- quency fS coupled onto the ADC VCC supply. Here a 100 mV peak-to-peak sine wave is coupled onto the VCC supply. Decou- pling capacitors of 10 µF and 0.1 µF were used on the supply. VCC RIPPLE FREQUENCY – kHz 0 100 –60 –80 –100 –120 60 40 30 20 10 0 –20 –40 80 50 70 90 VCC = 3V, VREF = 2.5V 100mV p-p SINEWAVE ON +VCC fSAMPLE = 125kHz, fIN = 20kHz TPC 13. AC PSRR vs. Supply Ripple Frequency |
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