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DM74LS221N Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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DM74LS221N Datasheet(HTML) 1 Page - National Semiconductor (TI) |
1 / 6 page TLF6409 February 1992 DM74LS221 Dual Non-Retriggerable One-Shot with Clear and Complementary Outputs General Description The DM74LS221 is a dual monostable multivibrator with Schmitt-trigger input Each device has three inputs permit- ting the choice of either leading-edge or trailing-edge trig- gering Pin (A) is an active-low trigger transition input and pin (B) is an active-high transition Schmitt-trigger input that allows jitter free triggering for inputs with transition rates as slow as 1 voltsecond This provides the input with excellent noise immunity Additionally an internal latching circuit at the input stage also provides a high immunity to VCC noise The clear (CLR) input can terminate the output pulse at a prede- termined time independent of the timing components This (CLR) input also serves as a trigger input when it is pulsed with a low level pulse transition ( ) To obtain the best and trouble free operation from this device please read op- erating rules as well as the NSC one-shot application notes carefully and observe recommendations Features Y A dual highly stable one-shot Y Compensated for VCC and temperature variations Y Pin-out identical to ’LS123 (Note 1) Y Output pulse width range from 30 ns to 70 seconds Y Hysteresis provided at (B) input for added noise immunity Y Direct reset terminates output pulse Y Triggerable from CLEAR input Y DTL TTL compatible Y Input clamp diodes Note 1 The pin-out is identical to ’LS123 but functionally it is not refer to Operating Rules 10 in this datasheet Functional Description The basic output pulse width is determined by selection of an external resistor (RX) and capacitor (CX) Once triggered the basic pulse width is independent of further input tran- sitions and is a function of the timing components or it may be reduced or terminated by use of the active low CLEAR input Stable output pulse width ranging from 30 ns to 70 seconds is readily obtainable Connection Diagram Dual-In-Line Package TLF6409 – 1 Order Number DM74LS221M or DM74LS221N See NS Package Number M16A or N16A Function Table Inputs Outputs CLEAR A B Q Q LX X L H XH X L H XX L L H HL u H v H u LH H e High Logic Level L e Low Logic Level X e Can Be Either Low or High u e Positive Going Transition v e Negative Going Transition e A Positive Pulse e A Negative Pulse This mode of triggering requires first the B input be set from a low to high level while the CLEAR input is maintained at logic low level Then with the B input at logic high level the CLEAR input whose positive transition from low to high will trigger an output pulse TLF6409 – 2 C1995 National Semiconductor Corporation RRD-B30M105Printed in U S A |
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