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CS4349-DZZR Datasheet(PDF) 7 Page - Cirrus Logic

No. de pieza CS4349-DZZR
Descripción Electrónicos  192 kHz DAC w/ Volume Control and 1 Vrms @ 3.3 V
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Fabricante Electrónico  CIRRUS [Cirrus Logic]
Página de inicio  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4349-DZZR Datasheet(HTML) 7 Page - Cirrus Logic

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7
CS4349
Control Port Definitions
AD1/CDOUT
1
Address Bit 1 / Serial Control Data Out (I/O) - Chip address bit 1 in I²C Mode or data output in SPI Mode
AD0/CS
2
Address Bit 0 / Chip Select (Input) - Chip address bit 0 in I²C Mode or Chip Select in SPI Mode
SDA/CDIN
3
Serial Control Data In (I/O) - Input/Output for I²C data. Input for SPI data
SCL/CCLK
4
Serial Control Port Clock (Input) - Serial clock for the control port interface
TSTO
8
Test Output (Output) - This pin needs to be floating and not connected to any trace or plane.
Stand-Alone Definitions
DIF0
DIF1
DIF2
3
4
1
Digital Interface Format (Input) - Defines the required relationship between the Left Right Clock, Serial
Clock, and Serial Audio Data
DEM
2
De-emphasis (Input) - Selects the standard 15
μs/50 μs digital de-emphasis filter response for
44.1 kHz sample rates
POPGUARD
8
Popguard Disable (Input/Output) - At RST this pin is an input to disable PopGuard when pulled high;
Otherwise leave floating. After RST is released this pin becomes TSTO.


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