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ES4810FAA Datasheet(PDF) 3 Page - ESS Technology,Inc |
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ES4810FAA Datasheet(HTML) 3 Page - ESS Technology,Inc |
3 / 4 page ESS Technology, Inc. SAM0660-080406 3 ES4810SAA PRODUCT BRIEF P C BOARD LAYOUT CONSIDERATIONS PRELIMINARY P C BOARD LAYOUT CONSIDERATIONS Required Printed Circuit Board Layout The ES4810 LQFP package requires additional heat sinking to prevent heat-caused damage to the chip. To accomplish this heat dissipation in an economical manner, the following printed circuit board (PCB) layout is required. The land pattern for the chips still use the standard 208-pin LQFP footprint on the PCB with the addition of the heat sink, as shown in Figure 3. Required for heat dissipation is the addition of a solid copper fill on the top and bottom layers of the PCB, along with 1mm square solder mask exposures and via in the center of each exposure. The metal land on the underside of the IC must have more than 90% of its surface area directly soldered onto the PCB (i.e., the solder mask openings as shown below) for the heat dissipation to be effective. It is not recommended to route any traces between the land pattern and metal land. The specifications for the LQFP heat sinking is listed in Table 1 Figure 3 Required PCB Layout for Heat Dissipation Table 1 LQFP Heat Sink Specifications Parameters Dimensions Parameters Dimensions PCB Layers 4, minimum Via diameter 0.3 mm Solder mask opening (top layer) 1.0 × 1.0 mm Via spacing (center to center) 1.2 mm Solder mask width 0.2 mm Via plating must be plugged VIA, 0.3 dia. solder mask (top layer) solder mask opening (top layer) SAM0508-03 0.2 1.0 1.2 0.2 0.2 0.2 1.0 1.2 Dimensions in mm 7.4 7.4 |
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