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ADS1281IPWRG4 Datasheet(PDF) 5 Page - Texas Instruments |
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ADS1281IPWRG4 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 46 page www.ti.com DEVICE INFORMATION CLK SCLK DRDY DOUT MOD/DIN DGND PHS/MCLK DR1/M1 DR0/M0 HPF/SYNC MFLAG DGND BYPAS DGND DVDD PINMODE RESET PWDN VREFP VREFN AVSS AVDD AINN AINP 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 ADS1281 ADS1281 SBAS378A – SEPTEMBER 2007 – REVISED NOVEMBER 2007 TSSOP-24 Top View TERMINAL FUNCTIONS DESCRIPTION NAME NO. FUNCTION PIN MODE (PINMODE = 1) REGISTER MODE (PINMODE = 0) CLK 1 Digital input Master clock input Master clock input SCLK 2 Digital input SPI serial clock input SPI serial clock input DRDY 3 Digital output Data ready output: read data on falling edge Data ready output: read data on falling edge DOUT 4 Digital output SPI serial data output SPI serial data output MOD: 0 = Digital filter mode MOD/DIN 5 Digital input DIN: SPI serial data input 1 = Filter bypass (modulator output) (MOD = 0) PHS: If in modulator mode: PHS/MCLK 7 Digital I/O 0 = Linear phase filter, 1 = Minimum phase filter MCLK: Modulator clock output (MOD = 1) MCLK: Modulator clock output Otherwise, the pin is an unused input (must be tied). If in modulator mode: (MOD = 0) DR1 = Data rate select input 1 DR1/M1 8 Digital I/O M1: Modulator data output 1 (MOD = 1) M1 = Modulator data output 1 Otherwise, the pin is an unused input (must be tied). If in modulator mode: (MOD = 0) DR0 = Data rate select input 0 DR0/M0 9 Digital I/O M0: Modulator data output 0 (MOD = 1) M0 = Modulator data output 0 Otherwise, the pin is an unused input (must be tied). (MOD = 0) HPF: 0 = High-pass filter off, 1 = HPF on HPF/SYNC 10 Digital input SYNC: Synchronize input (MOD = 1) SYNC = Synchronize Input Modulator over-range flag: Modulator over-range flag: MFLAG 11 Digital output 0 = Normal, 1 = Modulator over-range 0 = Normal, 1 = Modulator over-range DGND 6, 12, 23 Digital ground Digital ground, pin 12 is the key ground point Digital ground, pin 12 is the key ground point AINP 13 Analog input Positive analog input Positive analog input AINN 14 Analog input Negative analog input Negative analog input AVDD 15 Analog supply Positive analog power supply Positive analog power supply AVSS 16 Analog supply Negative analog power supply Negative analog power supply VREFN 17 Analog input Negative reference input Negative reference input VREFP 18 Analog input Positive reference input Positive reference input PWDN 19 Digital input Power-down input, active low Power-down input, active low RESET 20 Digital input Synchronize input Reset input PINMODE 21 Digital input 1 = Pin mode 0 = Register mode DVDD 22 Digital supply Digital power supply: +1.8V to +3.3V Digital power supply: +1.8V to +3.3V BYPAS 24 Capacitor bypass Digital core bypass; 1 µF bypass capacitor to GND Digital core bypass; 1 µF bypass capacitor to GND Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): ADS1281 |
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