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ADS1282IPW Datasheet(PDF) 10 Page - Texas Instruments |
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ADS1282IPW Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 42 page  www.ti.com ADC MODULATOR GainControl PGA[2:0]Bits (+) ( ) - CHOP CHOP AVSS CAPP 300W 300W (+) ( ) - A 1 A 2 AVDD CAPN ModulatorEffectiveZ IN (55k ,typ W ) (1) 2nd-Order 2nd-Stage DS 2nd-Order 1st-Stage DS AnalogInput(V ) IN 4th-OrderModulator MCLK M0 M1 f CLK/4 10 Frequency(Hz) 100 10 1 100 1k PGACHOPOff PGACHOPOn Y[n]=3M0[n 2] 6M0[n 3]+4M0[n 4] +9(M1[n] 2M1[n 1]+M1[n 2]) - - - - - - - (2) ADS1282 SBAS418A – SEPTEMBER 2007 – REVISED DECEMBER 2007 The ADC block of the ADS1282 is composed of two blocks: a high-accuracy modulator and a programmable digital filter. The high-performance modulator is an inherently-stable, fourth-order, ΔΣ, 2 + 2 pipelined structure, as shown in Figure 6. It shifts the quantization noise to a higher frequency (out of the passband) where digital filtering can easily remove it. The modulator can be filtered either by the on-chip digital filter or by use of post-processing filters. (1) See the Modulator Input Impedance section. Figure 4. PGA Block Diagram Figure 6. Fourth-Order Modulator The modulator first stage converts the analog input voltage into a pulse-code modulated (PCM) stream. When the level of differential analog input (AINP – AINN) is near one-half the level of the reference voltage 1/2 × (VREFP – VREFN), the ‘1’ density of the PCM data stream is at its highest. When the level of the differential analog input is near zero, the PCM ‘0’ and ‘1’ densities are nearly equal. At the two extremes of the analog input levels (+FS and –FS), Figure 5. PGA Noise the ‘1’ density of the PCM streams are approximately +90% and +10%, respectively. The modulator second stage produces a '1' density data stream designed to cancel the quantization noise of the first stage. The data streams of the two stages are then combined before input to the digital filter stage, as shown in Equation 2. M0[n] represents the most recent first-stage output while M0[n – 1] is the previous first-stage output. When the modulator output is enabled, the digital filter shuts down to save power. 10 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): ADS1282 |
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