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TC74HC573AP Datasheet(PDF) 5 Page - Toshiba Semiconductor

No. de pieza TC74HC573AP
Descripción Electrónicos  CMOS Digital Integrated Circuit Silicon Monolithic Octal D-Type Latch with 3-State Output
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Fabricante Electrónico  TOSHIBA [Toshiba Semiconductor]
Página de inicio  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TC74HC573AP Datasheet(HTML) 5 Page - Toshiba Semiconductor

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TC74HC573AP/AF
2007-10-01
5
AC Characteristics (input: tr = tf = 6 ns)
Test Condition
Ta
= 25°C
Ta
=
−40 to 85°C
Characteristics
Symbol
CL (pF) VCC (V)
Min
Typ.
Max
Min
Max
Unit
Output transition time
tTLH
tTHL
50
2.0
4.5
6.0
20
6
5
60
12
10
75
15
13
ns
50
2.0
4.5
6.0
50
15
13
115
23
20
145
29
25
Propagation delay
time
(LE-Q)
tpLH
tpHL
150
2.0
4.5
6.0
60
20
17
155
31
26
195
39
33
ns
50
2.0
4.5
6.0
42
14
12
110
22
19
140
28
24
Propagation delay
time
(D-Q)
tpLH
tpHL
150
2.0
4.5
6.0
57
19
16
150
30
26
190
38
32
ns
50
2.0
4.5
6.0
55
17
14
140
28
24
175
35
30
Output enable time
tpZL
tpZH
RL = 1 kΩ
150
2.0
4.5
6.0
66
22
19
180
36
31
225
45
38
ns
Output disable time
tpLZ
tpHZ
RL = 1 kΩ
50
2.0
4.5
6.0
40
17
15
125
25
21
155
31
26
ns
Input capacitance
CIN
5
10
10
pF
Output capacitance
COUT
10
pF
Power dissipation
capacitance
CPD
(Note)
51
pF
Note:
CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD・VCC・fIN + ICC/8 (per latch)
And the total CPD when n pcs. of latch operate can be gained by the following equation:
CPD (total) = 33 + 18・n


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