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AD5422BREZ Datasheet(PDF) 2 Page - Analog Devices |
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AD5422BREZ Datasheet(HTML) 2 Page - Analog Devices |
2 / 37 page AD5422 Preliminary Technical Data Rev. PrE | Page 2 of 37 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Functional Block Diagram .............................................................. 3 Specifications..................................................................................... 4 AC Performance Characteristics ................................................ 7 Timing Characteristics ................................................................ 8 Absolute Maximum Ratings.......................................................... 10 ESD Caution................................................................................ 10 Pin Configuration and Function Descriptions........................... 11 Typical Performance Characteristics Voltage output............... 13 Typical Performance Characteristics current output ............... 17 Typical Performance Characteristics general ............................ 20 Terminology .................................................................................... 22 Theory of Operation ...................................................................... 24 Architecture................................................................................. 24 Serial Interface ............................................................................ 24 Default configuration................................................................. 28 Transfer Function ....................................................................... 28 Data Register ............................................................................... 29 Control Register.......................................................................... 29 RESET register ............................................................................ 29 Status register .............................................................................. 30 Features ............................................................................................ 31 fault alert...................................................................................... 31 voltage output short circuit protection.................................... 31 Asynchronous Clear (CLEAR) ................................................. 31 Internal Reference ...................................................................... 31 External current setting resistor ............................................... 31 Voltage ouTput over-range........................................................ 31 Digital Power Supply.................................................................. 31 External boost function............................................................. 31 digital Slew rate control ............................................................. 32 IOUT Filtering Capacitors ............................................................ 32 Applications Information .............................................................. 33 driving inductive loads .............................................................. 33 Transient voltage protection ..................................................... 33 Layout Guidelines....................................................................... 33 Galvanically Isolated Interface ................................................. 33 Microprocessor Interfacing....................................................... 33 Thermal and supply considerations......................................... 34 Outline Dimensions ....................................................................... 35 Ordering Guide .......................................................................... 35 REVISION HISTORY PrE – Preliminary Version, November 22, 2007 |
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