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TS1900 Datasheet(PDF) 3 Page - Taiwan Semiconductor Company, Ltd |
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TS1900 Datasheet(HTML) 3 Page - Taiwan Semiconductor Company, Ltd |
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3 / 5 page  TS1900 Ultra Low Quiescent Current Smart Load Switch 3/5 Version: A07 Application Information The TS1900 featured very low quiescent current and very low RDS(ON) and making them ideal for battery-powered applications. The ENABLE control pin is TTL compatible and driven by 1.5V beyond making the TS1900 an ideal level- shifting load switch. Input Capacitor Selection A 1UF or larger input capacitor is recommended to prevent load transients from affecting upstream circuits. CIN should be located as close to the device VIN pin as practically. There is no specific requirement type of capacitor is recommended. However, for higher current operation, ceramic capacitors are recommended for CIN. L=[VOUT X (VIN-VOUT)] / [VIN X (ΔIL X(FOSC] Where ΔIL is the inductor ripple current. Larger inductance is recommended for better efficiency in light load condition. Output Capacitor Selection For proper slew operation, a 0.1uF or greater is recommended. The output capacitor has also no specific capacitor type requirement. If desired, COUT maybe increased without limit to accommodate any load transient Reverse Output-to-Input Voltage Conditions and Protection Under normal conditions, there is a parasitic diode between the output & input of the load switch. In case of VOUT exceeding VIN, this would forward bias the internal parasitic diode and allow excessive current flow into the VOUT pin and possibly damage the load switch. In applications, where there is a possibility of VOUT exceeding VIN for brief periods of time during operation, the use of larger value CIN capacitor is highly recommended. A larger value of CIN with respect to COUT will affect a slower CIN decay rate during shutdown, thus preventing VOUT from exceeding VIN. In case of extended period of time for VOUT exceeding VIN, it is recommended to place a Schottky diode from VIN to VOUT. Thermal Considerations The TS1900 is designed to deliver a continuous load current. The maximum limit is package power dissipation. At any given ambient temperature, the maximum package power dissipation can be determined by the following equation: PD(MAX) = [TJ(MAX) - TA] / θJA Constraints for the TS1900 are maximum TJ(MAX) = 125°C, and package thermal resistance, θJA = 120°C /W. The maximum continuous output current for TS1900 depends on package power dissipation and the RDS(ON) of MOSFET at TJ(MAX). Typical conditions are calculated under normal ambient condition where TA = 25°C At 85°C, PD(MAX) = 333mW. At TA = 25 , PD(MAX) = 833mW. The maximum current is calculated by the following equation: IOUT < (PD(MAX) / RDS(MAX))<(1/2) For example, if VIN = 5V, RDS(MAX) = 160mΩ and TA = 25℃, IOUT(MAX) = 2.2A. Thermal Shutdown is employed to protect the device damage when over temperature 160°C. PCB Layout Consideration To maximize TS1900 performance, some board layout rules should be followed: VIN and VOUT should be routed using wider than normal traces, and GND should be connected to a ground plane. For best performance, CIN and COUT should be placed close to the package pins. |
Número de pieza similar - TS1900 |
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Descripción similar - TS1900 |
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