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S29GL064A100TFIR12 Datasheet(PDF) 22 Page - SPANSION

No. de pieza S29GL064A100TFIR12
Descripción Electrónicos  64 Megabit, 32 Megabit, and 16 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 200 nm MirrorBit Process Technology
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S29GL-A
S29GL-A_00_A11 September 10, 2007
Da ta
Sh e e t
7.
Device Bus Operations
This section describes the requirements and use of the device bus operations, which are initiated through the
internal command register. The command register itself does not occupy any addressable memory location.
The register is a latch used to store the commands, along with the address and data information needed to
execute the command. The contents of the register serve as inputs to the internal state machine. The state
machine outputs dictate the function of the device. Table 7.1 lists the device bus operations, the inputs and
control levels they require, and the resulting output. The following subsections describe each of these
operations in further detail.
Legend
L = Logic Low = VIL, H = Logic High = VIH, X = Don’t Care, VID = 11.5–12.5 V, VHH = 11.5–12.5 V, SA = Sector Address,
AIN = Address In, DIN = Data In, DOUT = Data Out
Notes
1. Addresses are Amax:A0 in word mode; Amax: A-1 in byte mode. Sector addresses are Amax:A15 in both modes.
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See Sector Group Protection
and Unprotection on page 41.
3. If WP# = VIL, the first or last sector remains protected (for uniform sector devices), and the two outer boot sectors are protected (for boot
sector devices). If WP# = VIH, the first or last sector, or the two outer boot sectors are protected or unprotected as determined by the
method described in Sector Group Protection and Unprotection on page 41. All sectors are unprotected when shipped from the factory
(The Secured Silicon Sector may be factory protected depending on version ordered.)
4. DIN or DOUT as required by command sequence, data polling, or sector protect algorithm (see Figure 10.3 on page 64).
Table 7.1 Device Bus Operations
Operation
CE#
OE#
WE#
RESET#
WP#
ACC
Addresses
(Note 1)
DQ0–
DQ7
DQ8–DQ15
BYTE#
= VIH
BYTE#
= VIL
Read
L
L
H
H
X
X
AIN
DOUT
DOUT
DQ8–DQ14
= High-Z,
DQ15 = A-1
Write (Program/Erase)
L
H
L
H
(Note 3)
XAIN
(Note 4)
(Note 4)
Accelerated Program
L
H
L
H
(Note 3)
VHH
AIN
(Note 4)
(Note 4)
Standby
VCC ± 0.3 V
X
X
VCC ±
0.3 V
X
H
X
High-Z
High-Z
High-Z
Output Disable
L
H
H
H
X
X
X
High-Z
High-Z
High-Z
Reset
X
X
X
L
X
X
X
High-Z
High-Z
High-Z
Sector Group Protect
(Note 2)
LH
L
VID
HX
SA, A6 =L,
A3=L, A2=L,
A1=H, A0=L
(Note 4)
XX
Sector Group Unprotect
(Note 2)
LH
L
VID
HX
SA, A6=H,
A3=L, A2=L,
A1=H, A0=L
(Note 4)
XX
Temporary Sector Group
Unprotect
XX
X
VID
HX
AIN
(Note 4)
(Note 4)
High-Z


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