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ADS6144IRHBT Datasheet(PDF) 5 Page - Texas Instruments |
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ADS6144IRHBT Datasheet(HTML) 5 Page - Texas Instruments |
5 / 68 page www.ti.com ELECTRICAL CHARACTERISTICS ADS6145, ADS6144 ADS6143, ADS6142 SLWS198A – JULY 2007 – REVISED OCTOBER 2007 Typical values are at 25 °C, min and max values are across the full temperature range T MIN = –40°C to TMAX = 85°C, AVDD = DRVDD = 3.3 V, maximum rated sampling frequency, 50% clock duty cycle, –1 dBFS differential analog input, internal reference mode, applies to CMOS and LVDS interfaces, unless otherwise noted. ADS6145 ADS6144 ADS6143 ADS6142 FS = 125 MSPS FS = 105 MSPS FS = 80 MSPS FS = 65 MSPS PARAMETER UNIT MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX RESOLUTION 14 14 14 14 Bits ANALOG INPUT Differential input voltage range 2 2 2 2 VPP Differential input resistance (dc), > 1 > 1 > 1 > 1 M Ω see Figure 94 Differential input capacitance, 7 7 7 7 pF see Figure 95 Analog input bandwidth 450 450 450 450 MHz Analog input common-mode current 180 151 114 92 µA (per input pin of each ADC) REFERENCE VOLTAGES VREFB Internal reference bottom voltage 1 1 1 1 V VREFT Internal reference top voltage 2 2 2 2 V ΔVREF Internal reference error -20 ± 5 20 -20 ± 5 20 -20 ± 5 20 -20 ± 5 20 mV (VREFT–VREFB) VCM Common-mode output voltage 1.5 1.5 1.5 1.5 V VCM Output current capability 4 4 4 4 mA DC ACCURACY No missing codes Specified Specified Specified Specified EO Offset error -10 ± 2 10 -10 ± 2 10 -10 ± 2 10 -10 ± 2 10 mV Offset error temperature coefficient 0.05 0.05 0.05 0.05 mV/ °C There are two sources of gain error – internal reference inaccuracy and channel gain error EGREF Gain error due to internal reference -1 0.25 1 -1 0.25 1 -1 0.25 1 -1 0.25 1 % FS inaccuracy alone, ( ΔVREF /2) % EGCHAN Gain error of channel alone(1) -1 ±0.3 1 -1 ±0.3 1 -1 ±0.3 1 -1 ±0.3 1 % FS Channel gain error temperature 0.005 0.005 0.005 0.005 Δ%/ °C coefficient DNL Differential nonlinearity -0.95 ± 0.6 2 -0.95 ± 0.6 2 -0.95 ± 0.5 2 -0.95 ± 0.5 2 LSB INL Integral nonlinearity -4.5 ± 2.5 4.5 -4.5 ± 2.5 4.5 -4 ± 2 4 -4 ± 2 4 LSB POWER SUPPLY IAVDD Analog supply current 123 110 94 84 mA Digital supply current, CMOS interface, IDRVDD 6.1 5.4 4.5 4.0 mA DRVDD = 1.8 V, No load capacitance, Fin= 2 MHz (2) Digital supply current, LVDS interface, IDRVDD 42 42 42 42 mA DRVDD = 3.3 V, with 100- Ω external termination Total power, CMOS, 417 625 374 525 318 440 285 400 mW DRVDD = 3.3 V Global power down 30 60 30 60 30 60 30 60 mW (1) Specified by design and characterization; not tested in production. (2) In CMOS mode, the DRVDD current scales with the sampling frequency and the load capacitance on the output pins (see Figure 87). Copyright © 2007, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): ADS6145, ADS6144 ADS6143, ADS6142 |
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