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ADS62P44IRGCT Datasheet(PDF) 7 Page - Texas Instruments |
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ADS62P44IRGCT Datasheet(HTML) 7 Page - Texas Instruments |
7 / 67 page ADS62P45, ADS62P44 ADS62P43, ADS62P42 REV1P0 SEP 2007 7 PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. www.ti.com www.ti.com ELECTRICAL CHARACTERISTICS Typical values at 25C, min & max values are across the full temperature range TMIN = -40C to TMAX = 85C, AVDD = 3.3V, DRVDD = 3.3V, 50% clock duty cycle, -1dBFS differential analog input, internal reference, applies to CMOS & LVDS interfaces, unless otherwise noted. ADS62P45 125 MSPS ADS62P44 105 MSPS ADS62P43 80 MSPS ADS62P42 65 MSPS PARAMETERS MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT DC ACCURACY No Missing Codes Assured Assured Assured Assured DNL Differential Non-Linearity TBD +/- 0.8 TBD TBD +/- 0.7 TBD TBD +/- 0.5 TBD TBD +/- 0.4 TBD LSB INL Integral Non-Linearity TBD +/- 3 TBD TBD +/- 2.5 TBD TBD +/-1.5 TBD TBD +/-1.5 TBD LSB Offset Error TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD mV Offset error temperature coefficient TBD TBD TBD TBD μV/ °C Offset error variation with supply TBD TBD TBD TBD mV/V There are two sources of gain error – internal reference inaccuracy and channel gain error Gain error due to internal reference inaccuracy alone TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD % FS Reference gain error temperature coefficient TBD TBD TBD TBD ∆%/ °C Gain error of channel alone (1) TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD % FS Channel gain error temperature coefficient TBD TBD TBD TBD ∆%/ °C Gain matching TBD TBD TBD TBD (1) This is specified by design and characterization; it is not tested in production. |
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