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ISL29013IROZ-T7 Datasheet(PDF) 6 Page - Intersil Corporation |
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ISL29013IROZ-T7 Datasheet(HTML) 6 Page - Intersil Corporation |
6 / 14 page 6 FN6485.0 February 13, 2008 Control Register 01(hex) The Read/Write control register has three functions: 1. Interrupt flag; Bit 5. This is the status bit of the interrupt. The bit is set to logic high when the interrupt thresholds have been triggered, and logic low when not yet triggered. Writing a logic low clears/resets the status bit. 2. Range/Gain; Bits 3 and 2. The Full Scale Range can be adjusted by an external resistor Rext and/or it can be adjusted via I2C using the Gain/Range function. Gain/Range has four possible values, Range(k) where k is 1 through 4. Table 9 lists the possible values of Range(k) and the resulting FSR for some typical value REXT resistors. Interrupt persist; Bits 1 and 0. The interrupt pin and the interrupt flag is triggered/set when the data sensor reading is out of the interrupt threshold window after m consecutive number of integration cycles. The interrupt persist bits determine m. Interrupt Threshold HI Register 02(hex) This register sets the HI threshold for the interrupt pin and the interrupt flag. By default the Interrupt threshold HI is FF(hex). The 8-bit data written to the register represents the upper MSB of a 16-bit value. The LSB is always 00(hex). Interrupt Threshold LO Register 03(hex) This register sets the LO threshold for the interrupt pin and the interrupt flag. By default the Interrupt threshold LO is 00(hex). The 8-bit data written to the register represents the upper MSB of a 16-bit value. The LSB is always 00(hex). Sensor Data Register 04(hex) and 05(hex) When the device is configured to output a signed 15-bit data, the most significant byte is accessed at 04(hex), and the least significant byte can be accessed at 05(hex). The sensor data register is refreshed after very integration cycle. Timer Data Register 06(hex) and 07(hex) Note that the timer counter value is only available when using the External Timing Mode. The 06(hex) and 07(hex) are the LSB and MSB respectively of a 16-bit timer counter value corresponding to the most recent sensor reading. Each clock cycle increments the counter. At the end of each integration period, the value of this counter is made available over the I2C. This value can be used to eliminate noise introduced by slight timing errors caused by imprecise external timing. Microcontrollers, for example, often cannot provide high-accuracy command-to-command timing, and the timer counter value can be used to eliminate the resulting noise. Calculating Lux The ISL29013’s output codes, DATA, are directly proportional to lux. The proportionality constant α is determined by the Full Scale Range (FSR), and the n-bit ADC which is user defined in the command register. The proportionality constant can also be viewed as the resolution; The smallest lux measurement the device can measure is α. Full Scale Range (FSR), is determined by the software programmable Range/Gain, Range(k), in the command register and an external scaling resistor REXT which is referenced to 100k Ω. TABLE 8. INTERRUPT FLAG BIT 5 OPERATION 0 Interrupt is cleared or not triggered yet 1 Interrupt is triggered TABLE 9. RANGE/GAIN TYPICAL FSR LUX RANGES BITS 3:2 k RANGE(k) FSR LUX RANGE@ REXT = 100k FSR LUX RANGE@ REXT = 50k FSR LUX RANGE@ REXT = 500k 0:0 1 2,000 2,000 4,000 400 0:1 2 8,000 8,000 16,000 1,600 1:0 3 32,000 32,000 64,000 6,400 1:1 4 128,000 128,000 256,000 25,600 TABLE 10. INTERRUPT PERSIST BITS 1:0 NUMBER OF INTEGRATION CYCLES 0:0 1 0:1 4 1:0 8 1:1 16 TABLE 11. DATA REGISTERS ADDRESS (hex) CONTENTS 04 Least-significant byte of most recent sensor reading. 05 Most-significant byte of most recent sensor reading. 06 Least-significant byte of timer counter value corresponding to most recent sensor reading. 07 Most-significant byte of timer counter value corresponding to most recent sensor reading. E α DATA × = (EQ. 1) α FSR 2 n ------------ = (EQ. 2) (EQ. 3) FSR Range k () 100kΩ R EXT ------------------ × = ISL29013 |
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