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SL2305ZC-1H Datasheet(PDF) 6 Page - SpectraLinear Inc

No. de pieza SL2305ZC-1H
Descripción Electrónicos  Low Jitter and Skew 10 to 140 MHz Zero Delay Buffer (ZDB)
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Fabricante Electrónico  SPECTRALINEAR [SpectraLinear Inc]
Página de inicio  http://www.spectralinear.com
Logo SPECTRALINEAR - SpectraLinear Inc

SL2305ZC-1H Datasheet(HTML) 6 Page - SpectraLinear Inc

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Rev 1.4, May 25, 2007
Page 6 of 11
SL2305
Switching Specifications: Unless otherwise stated VDD=3.3V+/-10% and both C and I Grades
Symbol
Description
Condition
Min
Max
Unit
High drive (-1H). All outputs CL=15pF
10
140
MHz
High drive (-1H), All outputs CL=30pF
10
100
MHz
Standard drive, (-1), All outputs CL=15pf
10
100
MHz
FMAX1
Maximum Frequency
[1]
(Input=Output )
All Active PLL Modes
Standard drive, (-1), All outputs CL=30pf
10
66
MHz
INDC
Input Duty Cycle
Measured at 1.4V, Fout=66MHz,
CL=15pF
30
70
%
OUTDC
Output Duty Cycle
[2]
Measured at 14V, Fout=66MHz,
CL=15pF
40
60
%
High drive (-1H), CL=10pF
1.5
ns
High drive (-1H), CL=30pF
1.8
ns
Standard drive (-1), CL=10pF
2.2
ns
tr/f
Rise, Fall Time (3.3V)
[2]
(Measured at: 0.8 to 2.0V)
Standard drive (-1), CL=30pF
2.5
ns
t1
Output-to-Output Skew
[2]
(Measured at VDD/2)
All outputs CL=0 or equally loaded, -1 or
-1H drives
120
ps
t2
Device-to-Device Skew
[2]
(Measured at VDD/2)
All outputs CL=0 or equally loaded, -1 or
-1H drives
400
ps
t3
Delay Time, CLKIN Rising
Edge to CLKOUT Rising
Edge
[2]
Measured at VDD/2
–150
150
ps
tPLOCK
PLL Lock Time
[2]
Time from 90% of VDD to valid clocks on
all the output clocks
1.0
ms
Fin=Fout=66 MHz, <CL=15pF, -1H drive
90
ps
Fin=Fout=66 MHz, <CL=15pF, -1 drive
100
ps
Fin=Fout=66 MHz, <CL=30pF, -1H drive
120
ps
CCJ
Cycle-to-cycle Jitter
[2]
Fin=Fout=66 MHz, <CL=30pF, -1 drive
140
ps
Notes:
1. For the given maximum loading conditions. See CL in Operating Conditions Table.
2. Parameter is guaranteed by design and characterization. Not 100% tested in production.


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