Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

ADSP-BF538BBCZ-5F8 Datasheet(PDF) 6 Page - Analog Devices

No. de pieza ADSP-BF538BBCZ-5F8
Descripción Electrónicos  Blackfin짰 Embedded Processor
Download  56 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

ADSP-BF538BBCZ-5F8 Datasheet(HTML) 6 Page - Analog Devices

Back Button ADSP-BF538BBCZ-5F8 Datasheet HTML 2Page - Analog Devices ADSP-BF538BBCZ-5F8 Datasheet HTML 3Page - Analog Devices ADSP-BF538BBCZ-5F8 Datasheet HTML 4Page - Analog Devices ADSP-BF538BBCZ-5F8 Datasheet HTML 5Page - Analog Devices ADSP-BF538BBCZ-5F8 Datasheet HTML 6Page - Analog Devices ADSP-BF538BBCZ-5F8 Datasheet HTML 7Page - Analog Devices ADSP-BF538BBCZ-5F8 Datasheet HTML 8Page - Analog Devices ADSP-BF538BBCZ-5F8 Datasheet HTML 9Page - Analog Devices ADSP-BF538BBCZ-5F8 Datasheet HTML 10Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 56 page
background image
Rev. 0
|
Page 6 of 56
|
May 2007
ADSP-BF538/ADSP-BF538F
External (Off-Chip) Memory
External memory is accessed via the external bus interface unit
(EBIU). This 16-bit interface provides a glueless connection to a
bank of synchronous DRAM (SDRAM) as well as up to four
banks of asynchronous memory devices including flash,
EPROM, ROM, SRAM, and memory mapped I/O devices.
The PC133-compliant SDRAM controller can be programmed
to interface to up to 128M bytes of SDRAM. The SDRAM con-
troller allows one row to be open for each internal SDRAM
bank, for up to four internal SDRAM banks, improving overall
system performance.
The asynchronous memory controller can be programmed to
control up to four banks of devices with very flexible timing
parameters for a wide variety of devices. Each bank occupies a
1M byte segment regardless of the size of the devices used, so
that these banks will only be contiguous if each is fully popu-
lated with 1M byte of memory.
Flash Memory
The ADSP-BF538F4 and ADSP-BF538F8 processors contain a
separate flash die, connected to the EBIU bus, within the pack-
age of the processors. Figure 4 on Page 6 shows how the flash
memory die and Blackfin processor die are connected.
The ADSP-BF538F4 contains a 4M bit (256K
16-bit) bottom
boot sector Spansion S29AL004D known good die flash mem-
ory. The ADSP-BF538F8 contains an 8M bit (512K
16-bit)
bottom boot sector Spansion S29AL008D known good die flash
memory. The following features are also included.
• access times as fast as 70 ns (EBIU registers must be set
appropriately)
• sector protection
• one million write cycles per sector
• 20 year data retention
The Blackfin processor connects to the flash memory die with
address, data, chip enable, write enable, and output enable con-
trols as if it were an external memory device.
The flash chip enable pin FCE must be connected to AMS0 or
AMS3–1 through a printed circuit board trace. When connected
to AMS0 the Blackfin processor can boot from the flash die.
When connected to AMS3–1 the flash memory appears as non-
volatile memory in the processor memory map shown in
Figure 3 on Page 5.
Flash Memory Programming
The ADSP-BF538F4 and ADSP-BF538F8 flash memory may be
programmed before or after mounting on the printed
circuit board.
To program the flash prior to mounting on the printed circuit
board, use a hardware programming tool that can provide the
data, address, and control stimuli to the flash die through the
external pins on the package. During this programming, VDDEXT
and GND must be provided to the package and the Blackfin
must be held in reset with bus request (BR) asserted and a
CLKIN provided.
The VisualDSP++
® tools may be used to program the flash
memory after the device is mounted on a printed circuit board.
Flash Memory Sector Protection
To use the sector protection feature, a high voltage (+12 V nom-
inal) must be applied to the flash FRESET pin. Refer to the flash
data sheet for details.
I/O Memory Space
Blackfin processors do not define a separate I/O space. All
resources are mapped through the flat 32-bit address space. On-
chip I/O devices have their control registers mapped into mem-
ory mapped registers (MMRs) at addresses near the top of the
4G byte address space. These are separated into two smaller
blocks, one which contains the control MMRs for all core func-
tions, and the other which contains the registers needed for
setup and control of the on-chip peripherals outside of the core.
The MMRs are accessible only in supervisor mode and appear
as reserved space to on-chip peripherals.
Booting
The ADSP-BF538/ADSP-BF538F processors contain a small
boot kernel, which configures the appropriate peripheral for
booting. If the processor is configured to boot from boot ROM
memory space, the processor starts executing from the on-chip
boot ROM. For more information, see Booting Modes on
Page 16.
Event Handling
The event controller on the ADSP-BF538/ADSP-BF538F pro-
cessors handle all asynchronous and synchronous events to the
processors. The processor provides event handling that sup-
ports both nesting and prioritization. Nesting allows multiple
Figure 4. Internal Connection of Flash Memory (ADSP-BF538Fx)
Refer to the Spansion web-site for the appropriate data sheets.
VSS
DATA15-0
GND
AWE
VCC
BYTE
RESET
CE
AMS3-0
RESET
ARE
ARDY
ADDR19-1
OE
WE
RY/
BY
VDDEXT
ADSP-BF538Fx
PACKAGE
DQ15-0
A18-0


Número de pieza similar - ADSP-BF538BBCZ-5F8

Fabricante ElectrónicoNo. de piezaDatasheetDescripción Electrónicos
logo
Analog Devices
ADSP-BF538BBCZ-5F8 AD-ADSP-BF538BBCZ-5F8 Datasheet
3Mb / 56P
   Blackfin Embedded Processor
Rev. PrD
ADSP-BF538BBCZ-5F8 AD-ADSP-BF538BBCZ-5F8 Datasheet
2Mb / 56P
   Blackfin Embedded Processor
REV. A
More results

Descripción similar - ADSP-BF538BBCZ-5F8

Fabricante ElectrónicoNo. de piezaDatasheetDescripción Electrónicos
logo
Analog Devices
ADSP-BF531 AD-ADSP-BF531_07 Datasheet
3Mb / 60P
   Blackfin짰 Embedded Processor
Rev. E
ADSP-BF561 AD-ADSP-BF561_07 Datasheet
3Mb / 64P
   Blackfin짰 Embedded Symmetric Multiprocessor
REV. B
ADSP-BF542 AD-ADSP-BF542 Datasheet
1Mb / 64P
   Embedded Processor
Rev. PrG
logo
Applied Micro Circuits ...
405EXR AMCC-405EXR Datasheet
176Kb / 2P
   Embedded Processor
logo
Analog Devices
ADSP-BF542 AD-ADSP-BF542_07 Datasheet
3Mb / 68P
   Embedded Processor
Rev. PrE
ADSP-BF542 AD-ADSP-BF542_1 Datasheet
3Mb / 100P
   Embedded Processor
Rev. C
ADSP-21266 AD-ADSP-21266_07 Datasheet
894Kb / 44P
   Embedded Processor
REV. C
ADSP-BF522C AD-ADSP-BF522C Datasheet
829Kb / 12P
   Embedded Processor
Rev. PrB
ADSP-TS101S AD-ADSP-TS101S Datasheet
827Kb / 44P
   Embedded Processor
REV. A
ADSP-21262 AD-ADSP-21262_05 Datasheet
1Mb / 48P
   Embedded Processor
REV. B
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56


Datasheet Descarga

Go To PDF Page


Enlace URL




Política de Privacidad
ALLDATASHEET.ES
¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com